相位域ADC偏移误差检测及补偿技术  

Detection and compensation technology for phase domain ADC offset error

作　　者：陈佳鑫 陈红梅[1] 王学锐 尹勇生[1] Chen Jiaxin;Chen Hongmei;Wang Xuerui;Yin Yongsheng(Institute of VLSI Design of HFUT,Hefei 230601,China)

机构地区：[1]合肥工业大学微电子设计研究所,合肥230601

出　　处：《电子测量与仪器学报》2021年第9期195-203,共9页Journal of Electronic Measurement and Instrumentation

基　　金：模拟集成电路重点实验室基金项目(6142802190506);安徽省协同创新项目(GXXT⁃2019⁃030)资助。

摘　　要：相位域模数转换器(Ph⁃ADC)利用正交IQ通道来提取相位信息,但IQ通道偏移误差会导致系统误码率(BER)升高。针对以上问题提出一种基于帧采样的同相正交(I/Q)偏移误差提取方法,并采用梯形积分法进行补偿。相关传统方法,该方法可以节省因内存访问,数据延迟以及系统对每个样本中断响应而浪费的时间。通过建立π/4 DQPSK解调,6⁃bit Ph⁃ADC,E N0为12 dB的数字调制系统来验证所提出相位域ADC偏移误差检测及补偿技术,仿真结果表明,当输入信号频率为450 kHzb,/I/Q偏移误差为10%时,系统的信号噪声畸变比(SNDR)由7.02提高到37.22 dB,系统的无杂散动态范围(SFDR)由17.37提高到38.74 dB,ENOB由1.03提升为5.89,校准后该方法可以使系统BER降低到10-5数量级,使误差矢量幅度(EVM)小于15 dB。Ph⁃ADC uses quadrature IQ channels to extract phase information,but IQ channel offset errors will cause the system’s bit error rate(BER)to increase.Aiming at the above problems,a method of extracting I/Q offset error based on frame sampling is proposed,and the trapezoidal integration method is used to compensate.Relative to the traditional method,this method can save time wasted due to memory access,data delay,and the system’s interrupt response to each sample.The proposed phase domain ADC offset error detection and compensation technology is verified by establishing aπ/4 DQPSK demodulation,6⁃bit Ph⁃ADC,Eb/N0 of 12 dB digital modulation system.The simulation results show that when the input signal frequency is 450 kHz,the I/Q offset error is 10%,the signal⁃to⁃noise distortion ratio(SNDR)of the system is increased from 7.02 to 37.22 dB,the spurious⁃free dynamic range(SFDR)of the system is increased from 17.37 to 38.74 dB,and the ENOB is increased from 1.03.After calibration,this method can reduce the BER of the system to the order of 10^(-5) and make the error vector magnitude(EVM)less than 15 dB.

关 键 词：相位域模数转换器 I/Q偏移误差 基于帧采样 梯形积分法 误码率 EVM 

分 类 号：TN431.1[电子电信—微电子学与固体电子学]