Advanced virtual prototyping for cyber-physical systems using RISC-V:implementation,verification and challenges  

作　　者：Vladimir HERDT Rolf DRECHSLER 

机构地区：[1]Institute of Computer Science,University of Bremen,Bremen 28359,Germany [2]Cyber-Physical Systems,DFKI GmbH,Bremen 28359,Germany

出　　处：《Science China(Information Sciences)》2022年第1期1-17,共17页中国科学（信息科学）（英文版）

基　　金：supported in part by the German Federal Ministry of Education and Research(BMBF)within the project Ver Sys(Grant No.01IW19001);the project Scale4Edge(Grant No.16ME0127);within the project SATi SFy(Grant No.16KIS0821K);the German Research Foundation(DFG);as part of Collaborative Research Center(Sonderforschungsbereich)1320 EASE-Everyday Activity Science and Engineering;University of Bremen(http://www.easecrc.org/,the research was conducted in subproject P04)。

摘　　要：Virtual prototypes(VPs)are crucial in today’s design flow.VPs are predominantly created in System C transaction-level modeling(TLM)and are leveraged for early software development and other system-level use cases.Recently,virtual prototyping has been introduced for the emerging RISC-V instruction set architecture(ISA)and become an important piece of the growing RISC-V ecosystem.In this paper,we present enhanced virtual prototyping solutions tailored for RISC-V.The foundation is an advanced open source RISC-V VP implemented in System C TLM and designed as a configurable and extensible platform.It scales from small bare-metal systems to large multi-core systems that run applications on top of the Linux operating system.Based on the RISC-V VP,this paper also discusses advanced VP-based verification approaches and open challenges.In combination,we provide for the first time an integrated and unified overview and perspective on advanced virtual prototyping for RISC-V.

关 键 词：virtual prototyping RISC-V System C TLM VERIFICATION 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]