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作 者:ZHANG Yanbo LIU Shubin LIANG Yuhua ZHU Zhangming
机构地区:[1]School of Microelectronics,Xidian University,Xi’an 710071,China
出 处:《Chinese Journal of Electronics》2022年第1期33-39,共7页电子学报(英文版)
基 金:supported by the National Key Research and Development Project of China(2018YFB2202400);the National Natural Science Foundation of China(U19A2053,61625403,61874174,62074119,62021004).
摘 要:This paper reports a successive approx-imation register(SAR)analog-to-digital converters(ADCs)with the 2nd-order and optimized noise shaping(NS)scheme.Based on the feed-forward structure,both noise transfer function(NTF)zero and pole optimization have been achieved simultaneously utilizing a cascaded IIR-FIR(infinite impulse response and finite impulse re-sponse)filter.The analysis shows that the proposed struc-ture provides a better NS efficiency than prior arts.The efficiency of the proposed NS scheme and the ADC per-formance are verified by simulation achieving a 14.2 ef-fective number of bits with an 8-bit SAR ADC architec-ture at an over sampling rate of 8 sampled at 100 MS/s.Taking advantage of the NTF zero-pole optimization,a low resolution SAR ADC is allowed under the same quantization noise budget in this structure.
关 键 词:Analog-to-digital converters(ADCs) FEED-FORWARD Zero-pole optimization Noise shaping Oversampling ADC Successive approximation register
分 类 号:TN713[电子电信—电路与系统] TN792
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