基于Xilinx select IO接口板间通信设计  

The Design Based on Xilinx Select IO Interface Board

作　　者：吴广智 邢丽娜 李健铎 孟宪华 Wu Guangzhi;Xing Lina;Li Jianduo;Meng Xianhua(College of Science and Technology,Guizhou University,Guiyang 550600,China;Neusoft Medical System Co.,Ltd.,Shenyang 110034,China)

机构地区：[1]贵州黔南科技学院,贵州贵阳550600 [2]东软医疗系统股份有限公司,辽宁沈阳110034

出　　处：《科学技术创新》2022年第2期81-84,共4页Scientific and Technological Innovation

摘　　要：随着对信息流量需求的不断增长,基于Xilinx的selecte io接口的serdes串行通信技术能够取代并行接口通信,以满足系统对传输宽带的要求。本设计来源于东软Westlake超声系统,实现无需手动调整IO延时便可以快速无误地传输板间通信数据,解决了以往需要耗费大量时间调整延时带来的数据传输错误的严重问题,并保证了数据传输的正确性。As the demand for information traffic continues to grow, serdes serial communication technology based on Xilinx selecte io interface can replace parallel interface communication to meet the system’s requirements for transmission broadband. This design is derived from Neusoft Westlake ultrasound system. It realizes that communication data between boards can be transmitted quickly and without error without manual adjustment of IO delay, which solves the serious problem of data transmission errors caused by the previous need to spend a lot of time adjusting delay, and guarantees The correctness of data transmission.

关 键 词：SERDES 串行通信 板间通信 FPGA 

分 类 号：TN791[电子电信—电路与系统]