调试功能仿真及验证平台设计  

Design of debugging function simulation and verification platform

作　　者：张洪波 ZHANG Hong-bo(CEC Huada Electronic Design Co.,Ltd.,Beijing Key Laboratory of RFID Chip Test Technology)

机构地区：[1]北京中电华大电子设计有限责任公司射频识别芯片检测技术北京市重点实验室

出　　处：《中国集成电路》2022年第1期80-85,共6页China lntegrated Circuit

摘　　要：本文档针对ARMCPU芯片,介绍了支持双核CPU芯片调试功能仿真平台和验证平台的设计及实现方法。调试功能仿真平台主要由验证脚本和Debug Driver程序组成;调试功能验证平台是基于仿真平台进行设计,直接使用仿真平台的Debug Driver程序,由MCU中验证程序替代仿真验证脚本的功能,使用验证设计更加灵活、全面。本文重点介绍了两个平台的结构设计,控制及调试接口,以及双核CPU调试功能设计。本设计有力保证了芯片验证质量,可以很快定位调试接口的相关问题,提升芯片开发及验证的效率。This paper for the ARM CPU chip,introduces design and implementation methods of the dual core CPU chip Debug Function Simulation Platform and Debug Function Verification Platform.Debug Function Simulation Platform is mainly composed of Test Scripts and Debug Driver program;Debug Function Verification Platform is designed based on the simulation platform,using Debug Driver of the simulation platform directly,replaces the function of simulation verification script with the verification program in MCU,and more flexible and comprehensive to verification design.This paper focuses on the structure design of the two platforms,the control and debug interface,and the design method of the dual core debugging.This design guarantees the quality of chip verification,and can quickly locate the debug interface problems,and improve the efficiency of chip development and verification.

关 键 词：调试功能 验证平台 双核CPU调试 

分 类 号：TN402[电子电信—微电子学与固体电子学]