基于硬件多线程机制的网络处理器微引擎设计  

Design of Network Processor Micro-engine Based on Hardware Multi-threading Mechanism

作　　者：刘思远 任敏华[1] 谷航平 LIU Siyuan;REN Minhua;GU Hangping(Advanced Integrated Circuit Research Institute, East China Institute of Computing Technology, Shanghai 201808, China)

机构地区：[1]华东计算技术研究所,先进集成电路研究院,上海201808

出　　处：《微型电脑应用》2022年第2期106-108,共3页Microcomputer Applications

摘　　要：网络处理器(NP)是一种专门处理网络应用数据包的处理器,和特殊应用集成电路(ASIC)相比,网络处理器有着更加灵活的特点,其可以通过编程来实现不同的网络应用。随着网络技术的发展,网络处理器的使用场景也变得越来越广泛,对微引擎(ME)的性能和执行效率也有了更高的要求。为此设计了一种硬件8线程微引擎,利用专用的硬件线程切换微码指令,完成微引擎和外部存储器以及协处理器之间的数据传输,运用硬件信号量机制,实现硬件线程间的切换,节约了微引擎的访存等待时间,提升了微引擎的工作效率,通过多线程共用指令存储器,节省指令储存空间。Network processor is a processor that specializes in processing network application data packets.Compared with special application integrated circuits,the network processor has more flexible characteristics,and it can realize different network applications through programming.With the development of network technology,the use scenarios of network processors has become more and more extensive,and higher requirements have been placed on the performance and execution efficiency of micro engine.A hardware 8-thread micro engine is designed,it uses dedicated hardware threads to switch microcode instructions to complete the data transmission between the micro engine,external memory and coprocessor.The hardware semaphore mechanism is used to realize the switching between hardware threads,which saves the memory access waiting time of the micro engine and improves the working efficiency of the micro engine.Through multi-thread sharing of instruction memory,it saves instruction storage space.

关 键 词：硬件多线程 网络处理器 微引擎 协处理器 MIPS架构 

分 类 号：TN-46[电子电信]