基于FPGA实现的MAC-MAC互连和时序优化  

MAC-MAC Connection and Timing Optimization based on FPGA

作　　者：刘文慧[1] 陈沛然 贾永兴 LIU Wenhui;CHEN Peiran;JIA Yongxing(No.30 Institute of CETC,Chengdu Sichuan 610041,China)

机构地区：[1]中国电子科技集团公司第三十研究所,四川成都610041

出　　处：《通信技术》2022年第2期254-257,共4页Communications Technology

摘　　要：当前,现场可编程门阵列(Field Programmable Gate Array,FPGA)因其显著的优越性,已经成为构建数字系统的主角。随着FPGA外围电路规模和复杂程度的增大,逻辑功能正确的FPGA设计在某些场景下可能遇到时序问题,导致通信失败。结合工程实践,提出了一种基于FPGA实现两个介质访问控制层(Media Access Control,MAC)互连的方法,并针对互连接口的性能问题,提出了有效的时序优化解决方案。通过测试证明:该方案对FPGA与其他类型的外围接口的时序设计同样具有借鉴意义。Because of its remarkable advantages,FPGA(Field Programmable Gate Array)becomes the core of digital systems nowadays.With the increase of FPGA peripheral circuit and complexity,FPGA designs with correct logic functions may encounter timing problems in some scenarios,resulting in communication failures.According to project practice,this paper proposes a method to realize MAC-MAC connection based on FPGA,and puts forward an effective timing optimization solution for the performance of interconnection interface.The test proves that this method also has reference significance for the timing design of FPGA and other types of peripheral interfaces.

关 键 词：现场可编程门阵列 数字系统 介质访问控制层-介质访问控制层 时序优化 

分 类 号：TN919.4[电子电信—通信与信息系统]