一种CMOS低噪声有源下变频混频器  

A CMOS low-noise active down-conversion mixer

作　　者：张超权 郭本青 李珂 李磊[2] 周婉婷[2] ZHANG Chaoquan;GUO Benqing;LI Ke;LI Lei;ZHOU Wanting(College of Communication Engineering,Chengdu University of Information Technology,Chengdu 610225,China;Institute of Electronic Science and Technology,University of Electronic Science and Technology,Chengdu 611731,China)

机构地区：[1]成都信息工程大学通信工程学院,四川成都610225 [2]电子科技大学电子科学技术研究院,四川成都611731

出　　处：《微电子学与计算机》2022年第1期101-106,共6页Microelectronics & Computer

基　　金：国家自然科学基金(61871073)。

摘　　要：提出了一种采用电流源开关的低噪声开关跨导有源下变频混频器.使用正弦波本振大信号驱动可以避免因为脉冲本振谐波诱发的噪声叠加效应;利用LC谐振结构来缓解尾节点寄生电容充电和放电对电路高频工作时的限制.提出的混频器采用65 nm CMOS工艺实现,工作在5.2 GHz的RF频段下,最大转换增益为11.6 dB,输入三阶交调截取点(IIP3)为5.5 dBm。对于5.2 GHz的LO频率点,分别在fIF=10/200 MHz时测得4.3/3.3 dB的双边带噪声系数(NF).在1.2 V的供电电压下,所设计芯片功耗仅为8.4 mW.A low-noise active down-conversion mixerwith a current-source switch stageis proposed.Large sinusoidal LO(Local Oscillator)signal driving is used to avoid the traditional RF port noise transferring by LO harmonics.An LC resonance tank structure is exploited to mitigate the high-frequency limitation by the tail parasitic capacitances charging and discharging behavior.Implemented in a 65nm CMOS process,the proposed mixer prototype operates at an RF dual-band of 5.2 GHz and provides a maximal conversion gain of 11.6dB andinput third-order intercept point(IIP3)of 5.5dBm.For 5.2 GHz LO,the dual side-band noise figure of 4.3/3.3dB is measured at fIF=10/200 MHz,respectively.The mixer core only consumes 8.4mW from a 1.2V supply voltage.

关 键 词：CMOS 混频器 噪声系数 混频器共模抑制比 

分 类 号：TN432[电子电信—微电子学与固体电子学]