HEVC中分像素插值算法的动态可重构实现  

Dynamic reconfigurable implementation of sub-pixel interpolation algorithm in HEVC

作　　者：惠超 蒋林 朱筠 王萍 崔馨月 HUI Chao;JIANG Lin;ZHU Yun;WANG Ping;CUI Xin-yue(School of Electronic Engineering,Xi’an University of Posts and Telecommunications,Xi’an 710121,China;Laboratory of Integrated Circuit,Xi’an University of Science and Technology,Xi’an 710054,China)

机构地区：[1]西安邮电大学电子工程学院,陕西西安710121 [2]西安科技大学集成电路实验室,陕西西安710054

出　　处：《计算机工程与设计》2022年第3期764-770,共7页Computer Engineering and Design

基　　金：国家自然科学基金项目(61834005、61772417、61602377、61802304、61634004)。

摘　　要：针对高效视频编码(high efficiency video coding,HEVC)分像素运动估计亮度分量插值算法计算量大、冗余度高、难以实现不同编码块之间灵活切换的问题,提出一种动态可重构且具有高数据复用率的分像素插值算法实现方法。根据编码单元(coding unit,CU)的规模和大小自适应地对其周围参考像素块进行插值计算,得到最优预测单元的编码模式和运动矢量。实验结果表明,与专用硬件实现的分像素插值算法相比,不同编码块灵活切换的同时,参考像素的读取数量减少43.8%,硬件资源消耗减少18.5%。To solve the problems of high efficiency video coding(HEVC)sub-pixel motion estimation brightness component interpolation algorithm,which are computationally intensive,highly redundant and difficult to achieve flexible switching between different encoding blocks,a dynamic reconfigurable sub-pixel interpolation algorithm with high data reuse rate was proposed.The reference pixel blocks were adaptively interpolated according to the size of the coding unit(CU),and the coding mode and motion vector of the optimal prediction unit were obtained.Experimental results show that compared with the sub-pixel interpolation algorithm realized by special hardware,the number of reference pixels read is reduced by 43.8%and the hardware resource consumption is reduced by 18.5%while the algorithm switches flexibly.

关 键 词：高效视频编码 阵列处理器 动态可重构 高精度运动估计 分像素插值 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]