一种基于Chiplet集成技术的超高阶路由器设计  

A super high-radix router based on Chiplet integration technology

作　　者：梁崇山 戴艺[1] 徐炜遐[1] LIANG Chong-shan;DAI Yi;XU Wei-xia(College of Computer Science and Technology,National University of Defense Technology,Changsha 410073,China)

机构地区：[1]国防科技大学计算机学院,湖南长沙410073

出　　处：《计算机工程与科学》2022年第2期207-213,共7页Computer Engineering & Science

基　　金：量子信息研究兼高性能计算国家重点实验室基金(202101-07)。

摘　　要：高带宽、低延迟的高阶路由器对于构建大规模可扩展的互连网络有着重要的作用,但是受限于单个路由芯片设计复杂度的不断增加以及摩尔定律、登纳德缩放定律的放缓与停滞,在单个路由芯片上扩展更多的端口数将变得越来越难。Chiplet将多个裸片以特定的方式集成在一个高级封装内,形成具有特定功能的大芯片,以此解决芯片设计中涉及的规模、研制成本和周期等方面的问题。根据Chiplet集成技术的思想,利用已有的路由芯片,提出了一种基于Chiplet的128端口高阶路由器,这种高阶路由器内部是一个由多个Switch Die以二层胖树拓扑构成的网络。通过实际的RTL级代码仿真测试,对比于单芯片的高阶路由器设计方式,所设计的路由器在扩展了更多端口数的同时,还能够达到较好的性能。High-radix router with low latency and high bandwidth plays an important role in constructing large-scale interconnection networks.However,limited by the continuous increasingly design complexity and the slowdown and stagnation of Moore's law and Dennard scaling,it will become more and more difficult to expand a higher number of ports on a single routing chip.Chiplet integrates multiple dies in a high-level package to form a large chip with specific functions,so as to solve the problems of scale,cost and period in chip design.According to the idea of Chiplet integration technology and using existing routing chips,this paper proposes a 128-port high-radix router.The internal structure of this high-radix router is a a two-level fat-tree network composed of multiple switch dies.The actual RTL-level code simulation test shows that,compared with the single-chip high-radix router,the designed high-radix router achieves better performance while expanding more ports.

关 键 词：高阶路由器 Chiplet 互连网络 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]