一种新的星载AIS帧头检测算法及FPGA硬件实现  

Satellite-based AIS signal frame synchronization based ondifferential phase waveform matching and FPGA implementation

作　　者：王瑞 薛文[1] Wang Rui;Xue Wen(School of Electronic and Optical Engineering,Nanjing University of Science and Technology,Nanjing 210094,China)

机构地区：[1]南京理工大学电子工程与光电技术学院,南京210094

出　　处：《电子测量技术》2021年第23期117-125,共9页Electronic Measurement Technology

摘　　要：针对星载AIS时延和频偏大引发的信号同步问题,提出了一种新的基于差分相位波形匹配的帧头检测算法。理论分析了AIS帧中训练序列和开始标志部分信号的相位特征,使用专门的匹配算法对帧头进行检测。进行了仿真验证并在FPGA上进行了实现。该算法抗频偏性能极佳,且在低信噪比下仍有较高的检测率以及较低的误帧率和极低的虚警率。仿真结果表明,在13 dB比特信噪比下的检测率大于95%,虚警率小于10^(-8),相对于其他方案,所提出的运算复杂度很低,硬件资源消耗很少。To solve the signal synchronization problem caused by the wide range of time delay and frequency shift of the satellite-based automatic iden-tification system(AIS),a new frame header detection algorithm based on differential phase waveform matching is proposed.This paper analyzes of the phase characteristics of the signal of the training sequence and the start flag in the AIS frame structure,and uses a specific matching algorithm to detect the frame header.This algorithm is verified in simulation and implemented on FPGA.It has good properties in frequency shift resistance,and has a high detection rate,low frame error rate,and false alarm rate under low SNR.The detection rate is greater than 95% and the false alarm rate is less than 10^(-8) when E_(b)/N_(0) is less than 13 dB.Compared with other algorithms,the computational complexity and the hardware resource consumption proposed in this article is very low.

关 键 词：AIS信号 帧同步 差分相位 波形匹配 FPGA 

分 类 号：TN911[电子电信—通信与信息系统]