基于FPGA的视频信号转换系统设计  

Design of Video Format Conversion System Based on FPGA

作　　者：孔俊涛 朱向冰[1] 朱标 张青 陈瑾[1] 黄少肃 KONG Juntao;ZHU Xiangbing;ZHU Biao;ZHANG Qing;CHEN Jin;HUANG Shaosu(School of Physics and Electronic Information,Anhui Normal University,Wuhu,China;AVIC Huadong Photoelectric Company Limited,Wuhu,China)

机构地区：[1]安徽师范大学物理与电子信息学院,安徽芜湖 [2]中航华东光电有限公司,安徽芜湖

出　　处：《光电技术应用》2022年第1期67-73,共7页Electro-Optic Technology Application

摘　　要：针对视频信号不兼容,显示分辨率不匹配的问题,设计了一种基于FPGA的视频信号转换硬件结构系统。首先通过信号解码模块将输入的视频信号解码,然后采用地址复用的方式进行控制两片外部存储器件DDR2进行帧频转换,最后使用查找表的方式实现双三次插值算法对图像进行放缩。提高了代码的复用率,降低了计算复杂度,最终实现了将输入信号分辨率范围为640×480到1 920×1 200,传输协议为VGA、AV、DVI的视频信号,统一转换成LVDS输出的分辨率为1 600×1 200,刷新频率为60 Hz,像素时钟为162 MHz的输出信号。经实验测试,本系统能够充分满足视频格式转化和分辨率提升的需求,能够在广泛的应用领域里解决数据传输的格式不兼容问题。Aiming at the problem of video signal incompatibility and display resolution mismatch, a field programmable gate array(FPGA)-based video frame rate format conversion hardware structure system is designed. At first, the input video signal is decoded through the signal decoding module, and then the address multiplexing method is adopted to control two external storage devices such as DDR2 for frame rate conversion, at last, a look-up table is used to implement the bicubic interpolation algorithm to scale the image. The code multiplexing rate is improved and the computational complexity is reduced. And finally, the input video signal with 640×480 to 1 920×1 200 resolution range and VGA, AV, DVI transmission protocol being unified converted into LVDS output signal with 1 600×1 200 resolution, 60 Hz refresh frequency and 162 MHz pixel clock is realized. After experimental testing,the requirements of video format conversion and resolution enhancement can be fully met, and the problem of format incompatibility of data transmission in a wide range of applications can be solved.

关 键 词：FPGA 帧频转换 外部存储器 双三次插值 查找表 

分 类 号：TN722.1[电子电信—电路与系统]