基于电流模逻辑的宽频带二分频器设计  

Design of wideband divide-by-2 frequency divider based on current mode logic circuit

作　　者：张博 王好博 杨朋 吴昊谦 ZHANG Bo;WANG Haobo;YANG Peng;WU Haoqian(School of Electronic Engineering,Xi'an University of Posts and Telecommunications,Xi'an 710121,China)

机构地区：[1]西安邮电大学电子工程学院,陕西西安710121

出　　处：《电子元件与材料》2022年第3期273-277,共5页Electronic Components And Materials

基　　金：陕西省教育厅服务地方产业化专项(15JF029);陕西省重点研发计划(2018ZDXM-GY-010,2017ZDXM-GY-004,2016KTCQ01-08);西安市集成电路重大专项(201809174CY3JC16);陕西省教育厅重点科学研究计划(20JY059)。

摘　　要：设计了一种基于电流模逻辑结构(CML)具有宽频率覆盖范围的二分频器。针对CML电路无法在低频段稳定工作的问题,在传统的CML电路结构中加入了偏置电路,提高了电路的响应速度;并加入了差分结构的电容阵列,在高频段采用较低的输出电容负载,在低频段采用较高的输出电容负载,拓宽了分频器的工作频率范围;同时减少了开关管的使用,有利于降低芯片的面积和功耗。基于TSMC 0.18μm RF CMOS工艺进行了仿真验证。仿真结果表明,在电源电压为1.8 V,输入频率范围200 MHz~11 GHz的情况下,二分频逻辑功能正确,可实现宽的频率覆盖范围。A divide-by-2 divider with wideband coverage was designed based on current mode logic(CML)circuits.The CML circuit could not operate stably in low frequency band.To address this problem,a bias circuit was added to the traditional CML circuit structure to improve its response speed.Then a capacitor array with differential structure was added to broaden the working frequency range of the frequency divider by using a lower output capacitor load in the high frequency band and a higher output capacitor load in the lower frequency band.At the same time,the use of switching was reduced,which was beneficial to reduce the chip area and power consumption.Simulation verification was based on the TSMC 0.18μm RF CMOS process.The simulation result shows that the divided-frequency function can be realized with a wide frequency coverage at supply voltage of 1.8 V and input frequency range from 200 MHz to 11 GHz.

关 键 词：CML 分频器 D触发器 电容阵列 

分 类 号：TN722[电子电信—电路与系统]