基于FPGA的实时Bayer解马赛克算法与实现  

FPGA-based real-time Bayer demosaicking algorithm and its implementation

作　　者：张泽宇 张弘[1] 伍凌帆 杨一帆 李旭亮 ZHANG Zeyu;ZHANG Hong;WU Lingfan;YANG Yifan;LI Xuliang(Beihang University,Beijing 102206,China)

机构地区：[1]北京航空航天大学,北京102206

出　　处：《应用光学》2022年第2期240-247,共8页Journal of Applied Optics

基　　金：国家自然科学基金(61872019,62002005,6200071402)。

摘　　要：Bayer阵列被广泛地应用于CMOS/CCD(complementary metal oxide semiconductor/charge-coupled device)等前端传感器中,用以对彩色图像进行压缩编码。通过解马赛克算法将Bayer阵列还原为红、绿、蓝彩色阵列,算法性能影响着成像有效分辨率和纹理细节。随着半导体工艺的发展和目标识别等新型应用需求的提出,图像设备向着高分辨率、低延迟的方向发展,原有的解马塞克算法遇到性能瓶颈。提出了一种基于FPGA(field programmable gate array)的实时解马赛克算法,能够准确地提取图像局部梯度方向并以引导实现色彩的插值复原,整体算法仅需7行数据延迟。算法设计充分考虑FPGA的硬件特点,设计了行缓存、梯度算子、梯度方向插值等模块,降低硬件开销。实验表明,本文算法在实现微米级延迟的同时,保持了对图像纹理细节区域的复原效果,在柯达数据集上的平均峰值信噪比达到38.26 dB。The Bayer array is widely applied in the front-end sensors such as complementary metal oxide semiconductor/charge-coupled device(CMOS/CCD),in order to compress and encode the color images.The Bayer array is restored to red,green and blue color arrays by demosaicking algorithm,and the performance of the algorithm affects the imaging effective resolution and texture details.With the development of semiconductor technology and proposal of demand of new applications such as target recognition,the image devices move toward high resolution and low latency,and the original demosaicking algorithm encounters performance bottlenecks.A real-time demosaicking algorithm based on the field programmable gate array(FPGA)was proposed,which could accurately extract the local gradient direction of the image and guide the interpolation restoration of the color.The overall algorithm only needed 7 lines of data delay,and fully considered the hardware characteristics of FPGA,and designed the modules such as line buffer,gradient operator and gradient direction interpolation to reduce the hardware cost.The experimental results show that the algorithm can achieve the micron-level latency,and maintain the restoration effect of texture detail area of the image.The average peak signal to noise ratio(PSNR)on Kodak data set can reach to 38.26 dB.

关 键 词：Bayer阵列 解马赛克算法 FPGA 实时图像处理 

分 类 号：TN391[电子电信—物理电子学]