FPGA互连测试中的反馈桥接故障覆盖问题  

Coverage Problem of Feedback-bridging Fault in the FPGA Interconnection Test

作　　者：毛志明 张颖[1] 姚嘉祺 华屹峰 杨济中 陈鑫[1] MAO Zhiming;ZHANG Ying;Yao Jiaqi;HUA Yifeng;YANG Jizhong;CHEN Xin(Department of Electronic and Information Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing 211100,China)

机构地区：[1]南京航空航天大学电子信息工程学院,南京211100

出　　处：《计算机测量与控制》2022年第4期23-28,49,共7页Computer Measurement &Control

基　　金：国家自然科学基金项目(61701228,61106029);模拟集成电路重点实验室基金项目(61428020304);航空科学基金(20180852005)。

摘　　要：现场可编程门阵列(FPGA)内部资源众多,其中互连资源出现故障的概率远远高于片内其他资源,而在以往许多互连测试研究中,所生成的测试配置存在无法覆盖反馈桥接故障的难题,所以较难有测试配置实现故障列表的100%覆盖;因此通过约束桥接故障只发生在单个查找表(LUT)内的信号线上,并结合单项函数,对反馈桥接故障模型进行优化改进,从根本上解决难题;然后对优化后的反馈桥接故障设置相应的约束条件,再使用布尔可满足性理论(SAT)生成满足约束条件的测试配置;采用优化后的故障模型对ISCAS 89基准电路进行了测试配置生成实验,结果表明生成的测试向量解决了反馈桥接故障的覆盖难题,并且在实现故障列表的100%覆盖下,优化后的故障模型所需要的测试配置数最少。There are many internal resources in Field Program Gate Array(FPGA),among which the failureprobability of interconnect resources is much higher than that of other on-chip resources.However,in many interconnect testresearches,the generated test configurations are hardly able to cover the feedback-bridging faults,so it was difficultto achieve 100%coverage of interconnection fault list.Therefore,in order to fundamentally solve the problem,the feedback bridge fault model is optimized by constraining the bridge faults within a single look-up table(LUT)and by using single-term functions.Thenthe corresponding constraints are set for the optimized feedback bridge faultsand the test configurations meeting,the constraints are generated using the Boolean Satisfiability theory(SAT).Finally,the test configuration generation experiment is carried outby the ISCAS 89 benchmark circuit,the experimental results show that the generated test vectors not only solve the coverage problem of feedback-bridging faults,but also achieve 100%coverage of the fault listwith the minimum configuration times.

关 键 词：反馈桥接故障 FPGA 互连测试 应用相关测试 SAT 

分 类 号：TP331.2[自动化与计算机技术—计算机系统结构] TN47[自动化与计算机技术—计算机科学与技术]