高速数字信号测试完整性分析与研究  

Analysis and Research on Integrity of High-speed Digital Signal Test

作　　者：王莹 王燕[1] 曹子剑[1] WANG Ying;WANG Yan;CAO Zijian(Nanjing Research Institute of Electronics Technology,Nanjing 210039,China)

机构地区：[1]南京电子技术研究所,南京210039

出　　处：《计算机测量与控制》2022年第4期45-49,共5页Computer Measurement &Control

摘　　要：雷达高速数字电路模块(基于VPX总线)的高速数字接口测试过程中,针对出现的高速数字信号质量不理想的问题,分析了该现象出现的原因并最终提出了保证测试过程中高速信号的信号完整性的解决方案:在高速信号连接电路设计中避免出现多个终端输出;实验结果表明,高速信号接口单一输出端的高速信号质量相比多个输出端的信号质量有明显改善,信号误码率优化了e^(10)倍;通过眼图测量,信号速率为1.25 Gbps时单一输出端的高速信号眼高为8.9μW,眼宽为730 ps,多个输出端的信号已经无法形成眼图;验证了高速数字信号测试时为了保证信号完整性应避免出现多个终端输出的正确性。In order to solve low quality problem of high speed digital signal interface testing in radar high speed digital circuit module(based on VPX bus),the above reason is analyzed and a solution is finally proposed to keep signal test integrity of high speed signal.The output of multiple terminals is avoided in high speed signal connection circuit.Experimental results show that high speed signal quality of single-output interface is much better than that of multiple terminals interface.The signal error rate is improved by e^(10) times.Eye-diagram is measured by 1.25 Gbps of signal rate,8.9μW of single terminal high speed signal eye height and 730 ps of eye width.However,the multiple terminals signal cannot form an eye figure.In order to ensure signal integrity in high speed digital signal testing,the output validity of multiple terminals t should be avoided.

关 键 词：高速数字信号 信号完整性 误码率 眼图 

分 类 号：TP23[自动化与计算机技术—检测技术与自动化装置]