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作 者:JIA Boxiong LI Jinming 贾博雄;李锦明(中北大学仪器与电子学院,山西太原030051)
机构地区:[1]School of Instruments and Electronics, North University of China, Taiyuan 030051, China
出 处:《Journal of Measurement Science and Instrumentation》2022年第2期217-224,共8页测试科学与仪器(英文版)
摘 要:With the rapid development of integrated circuit(IC)technology,reusable intelligent property(IP)core design is widely valued by the industry.Based on the in-depth study of the functional characteristics of advanced microcontroller bus architecture(AMBA),a design scheme of IP core is presented,and it is divided into the functional modules,and the structural design of the IP core is completed.The relationship between the internal modules of the IP core is clarified,and the top-down design method is used to build the internal architecture of the IP core.The IP core interface module,register module,baud rate module,transmit module,receive module,and interrupt module are designed in detail by using Verilog language.The simulation results show that the designed IP core supports serial peripheral interface(SPI)protocol,the function coverage of IP core reaches 100%,the maximum working frequency reaches 200 MHz,and the resource occupancy rate is less than 15%.The reusable IP core can support multiple data formats,multiple timing transmission modes,and master/slave operation modes,reducing the resource consumption of hardware circuits and having stronger applicability.
关 键 词:integrated circuit(IC) intelligent property(IP)core advanced microcontroller bus architecture(AMBA) serial peripheral interface(SPI)
分 类 号:TP3[自动化与计算机技术—计算机科学与技术]
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