EDA设计中的等长不等时研究  

Study on Equal Length and Unequal Time in EDA Design

作　　者：耶菲 Ye Fei(Xi'an Aeronautics Computing Technique Research Institute,AVIC,Xi'an Shaanxi 710068)

机构地区：[1]中航工业西安航空计算技术研究所,陕西西安710068

出　　处：《现代工业经济和信息化》2022年第3期282-284,共3页Modern Industrial Economy and Informationization

摘　　要：随着电子技术的不断发展,电路设计中的信号传输频率越来越高,当信号传输频率高达一定程度时,为了保证信号传输的时序一致,在大多数情况下要对并行传输信号要作等长处理。但在信号频率足够高的情况下,即使同组信号线都严格等长,但也会存在传输信号不同步到达的情况,即存在时序差异。围绕印制板结构、PCB设计软件、印制板材料、元器件管脚等影响PCB设计中信号线物理等长但信号时延却不相同的情况进行分析,希望能让大家对PCB电路设计中信号线等长问题有更深入的理解。With the continuous development of electronic technology, the signal transmission frequency in the circuit design is getting higher and higher. When the signal transmission frequency is as high as a certain degree, in order to ensure that the signal transmission sequence is consistent, in most cases, the parallel transmission signal length should be matched. However, if the signal frequency is high enough, if the signal lines in the same group are strictly of the same length, the transmitted signals will not arrive synchronously, that is, there will be difference in timing sequence.This paper analyzes the situations that affect the physical length of signal line in PCB design, such as PCB structure,PCB design software, PCB materials, component pins and so on, but the signal delay is different. Hope to let you have a deeper understanding of the signal line equilength in PCB circuit design.

关 键 词：印刷电路板 印制板设计 等长 

分 类 号：TN41[电子电信—微电子学与固体电子学]