机载电子跨时钟域同步电路验证及可靠性分析  

Verification and reliability analysis of synchronizers in clock domain crossing

作　　者：范毓洋 邓智 李子航 FAN Yuyang;DENG Zhi;LI Zihang(Civil Aircraft Airworthiness and Repair Key Laboratory of Tianjin, Civil Aviation University of China, Tianjin 300300, China;Airworthiness College, Civil Aviation University of China, Tianjin 300300, China)

机构地区：[1]中国民航大学民航航空器适航审定技术重点实验室,天津300300 [2]中国民航大学适航学院,天津300300

出　　处：《西北工业大学学报》2022年第2期369-376,共8页Journal of Northwestern Polytechnical University

基　　金：航空科学基金(20182667009)资助。

摘　　要：在航空器的机载设备中存在大量的多时钟域电路,数据在进行跨时钟域传输时可能会产生亚稳态,导致数据传输错误,电路可靠性降低。但亚稳态导致的故障具有偶发性、不易重现,且现有的跨时钟域专用验证软件使用成本高昂,不支持三模冗余场景下的跨时钟域电路验证。针对此问题,提出了一种基于传统工具的寄存器传输级(RTL)验证、板级加速测试和计算评估相结合的方法。该方法能够在设计早期使用通用仿真工具发现三模应用场景或正常场景下的跨时钟域传输问题,并评估潜在跨时钟域传输风险,降低了高安全等级机载复杂电子验证经济成本和时间成本,提高电路可靠性。There are a large number of multi-clock domain circuits in the airborne equipment of aircraft.When data is transmitted across the clock domain,meta-stability may occur,resulting in data transmission errors and reduced circuit reliability.However,due to the occasional and non-reproducible faults caused by metastability,and the high cost of existing cross-clock domain specific verification software,cross-clock domain circuit verification in three-mode redundancy scenarios is not supported.To solve this problem,a method that combines register transfer level(RTL)validation,board-level accelerated testing and computational evaluation based on traditional tools is presented.This method can detect the cross-clock domain transmission problems in three-mode application scenarios or normal scenarios and assess potential cross-clock domain transmission risks using generic simulation tools at an early stage of design.It reduces the cost of economy and time for high safety level airborne complex electronic verification,and improves the reliability of the circuit.

关 键 词：机载电子 跨时钟域 寄存器传输级验证 可靠性 

分 类 号：V243[航空宇航科学与技术—飞行器设计]