基于IPD工艺的滤波器设计  

Filter Design Based on IPD Technology

作　　者：李鹏浩 吴蓉[1] 马骁[2] 杨新豪 陈思婷 邱昕[2] 郭瑞[2] Li Penghao;Wu Rong;Ma Xiao;Yang Xinhao;Chen Siting;Qiu Xin;Guo Rui(School of Electronic and Information Engineering,Lanzhou Jiaotong University,Lanzhou 730070,China;Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China)

机构地区：[1]兰州交通大学电子与信息工程学院,兰州730070 [2]中国科学院微电子研究所,北京100029

出　　处：《半导体技术》2022年第4期313-319,共7页Semiconductor Technology

基　　金：国家自然科学基金青年基金资助项目(61905102);国家电网科学技术项目(SGTYHT/20-JS-221)。

摘　　要：采用集成无源器件(IPD)工艺设计并实现了一款9阶椭圆低通滤波器和一款9阶椭圆高通滤波器。利用设计软件对电感元件、滤波器中的串联和并联谐振支路以及滤波器整体进行设计布局以及电磁仿真优化。低通滤波器芯片尺寸为0.65 mm×1 mm×0.1 mm,高通滤波器芯片尺寸为0.7 mm×1.3 mm×0.1 mm。芯片测试结果显示,低通滤波器的-3 dB截止频率高于4.85 GHz,带外抑制在5.89~16.8 GHz内大于35 dB;高通滤波器的-3 dB截止频率低于6.35 GHz,带外抑制在5.17 GHz以下时大于35 dB。这两款滤波器在所需的工作频率范围内与设计指标吻合良好,达到了设计要求。A 9 th-order elliptic low-pass filter and a 9 th-order elliptic high-pass filter were designed and implemented with integrated passive device(IPD)process.The layout of inductance components,series and parallel resonant branches in the filters and the whole filters were designed by using the design software and optimized by electromagnetic simulation.The sizes of the low-pass filter chip and the high-pass filter chip are 0.65 mm×1 mm×0.1 mm and 0.7 mm×1.3 mm×0.1 mm,respectively.The test results of the chips show that the-3 dB cut-off frequency of the low-pass filter is higher than 4.85 GHz,and the out-of-band rejection is over 35 dB in the frequency range of 5.89-16.8 GHz;the-3 dB cut-off frequency of the high-pass filter is lower than 6.35 GHz,and the out-of-band rejection is over 35 dB when the frequency is below 5.17 GHz.These two filters are in good agreement with the design indexes within the required working frequency range and meet the design requirements.

关 键 词：集成无源器件(IPD) 高通滤波器 低通滤波器 电感 谐振 

分 类 号：TN713[电子电信—电路与系统]