基于PCIe总线的FPGA与PC间数据传输系统设计  

Design of Data Transmission System between FPGA and PC Based on PCIe Bus

作　　者：杨佳丽 YANG Jiali(School of Management,Xingzhi College of Xi’an University of Finance and Economics,Xi’an 710038,China)

机构地区：[1]西安财经大学行知学院管理学院,陕西西安710038

出　　处：《微型电脑应用》2022年第4期34-36,共3页Microcomputer Applications

基　　金：陕西省教育厅2021年度科学研究计划项目(21JK0641)。

摘　　要：实际应用过程中FPGA采集的数据经常需要传输到PC进行处理分析与运算。为了实现准确高效的数据传输,从分析DMA的控制逻辑及数据传输时序着手,采用PCIe总线技术设计FPGA与PC间以太网数据传输系统,采用PCIe IP Core实现数据时序控制以及PCIe事务处理,采用WinDriver的API函数设计驱动以及应用程序。经过测试,系统传输准确且性能优异,在单次DMA传输8MB时写入速度可达202 MB/s,读取速度可达178 MB/s,为高效数据传输提供了参考。The data collected by FPGA often needs to be transferred to PC for processing,analysis and calculation.In order to realize accurate and efficient data transmission,starting from the analysis of DMA control logic and data transmission sequence,an Ethernet data transmission system between FPGA and PC is designed using PCIe bus technology,and the PCIe IP Core is used to realize data timing control and PCIe transaction processing.WinDriver API functions are used to design drivers and applications.After testing,the system transmission accuracy and excellent performance are good,in a single DMA transmission 8MB write speed can be up to 202 MB/s,read speed up to 178 MB/s.For efficient data transmission it may provide a reference.

关 键 词：PCIe IP核 FPGA WINDRIVER DMA 

分 类 号：TP274.2[自动化与计算机技术—检测技术与自动化装置]