基于BP6562芯片的双Boost无桥功率因数校正设计  

Design of Double Boost Bridgeless Power Factor Correction Based on BP6562 Chip

作　　者：冯仕胜 FENG Shisheng(Shanghai Bright Power Semiconductor Co.,Ltd.,Shanghai 201210,China)

机构地区：[1]上海晶丰明源半导体股份有限公司,上海201210

出　　处：《通信电源技术》2021年第23期21-24,29,共5页Telecom Power Technology

摘　　要：传统有源功率因数校正(Active Power Factor Correction,APFC)电路整流桥的通态损耗较大,在大功率及低压输入的应用场合,通态损耗影响系统效率的提高。无桥功率因数校正(Power Factor Correction,PFC)可以有效降低整流桥的通态损耗,大大提升大功率及低压输入应用时的整机效率。采用BP6562双Boost无桥PFC,其具有控制电路简单、开关损耗小的特点,在中大功率低压输入时可获得高效率,并设置制作了500 W样机对该电路进行验证。The on state loss of the traditional Active Power Factor Correction(APFC)circuit rectifier bridge is relatively large.In the application of high power and low voltage input,the on-state loss affects the improvement of the system efficiency.Bridgeless Power Factor Correction(PFC)can effectively reduce the on-state loss of the rectifier bridge,and greatly improve the overall efficiency of high-power and low-voltage input applications.The BP6562 dual Boost bridgeless PFC is adopted,which has the characteristics of simple control circuit and low switching loss,and can obtain high efficiency when inputting medium and high power and low voltage.A 500 W prototype is set up to verify the circuit.

关 键 词：功率因数校正(PFC) 有源功率因数校正(APFC) 整流桥 通态损耗 

分 类 号：TM4[电气工程—电器]