用于FPGA的双向引脚多功能复用电路  

A Bidirectional Pin Multifunctional Multiplexing Circuit for FPGA

作　　者：张鑫刚 邵春伟 薛培 沈小波 官剑 Zhang Xingang;Shao Chunwei;Xue Pei;Shen Xiaobo;Guan Jian(Wuxi Hope Microelectronics Co.,Ltd.,Wuxi 214035,China)

机构地区：[1]无锡华普微电子有限公司,无锡214035

出　　处：《单片机与嵌入式系统应用》2022年第6期47-50,56,共5页Microcontrollers & Embedded Systems

摘　　要：提出一种应用于含有多个功能模块的FPGA工程中的电路,使多个功能模块可以共享多个FPGA双向引脚。通过允许用户在不获得FPGA工程原代码的情况下实时切换功能模块所占用的FPGA的双向引脚来提高FPGA工程固化后的应用灵活性。通过减少FPGA的双向引脚使用数量来解决VLSI验证应用领域的引脚数量瓶颈。仿真结果表明,该电路理论切换延迟最大为1个系统时钟周期。将该电路应用于含有4个功能模块的FPGA工程中,FPGA的双向引脚占用率最多可降低75%。推导出含有2~8个功能模块的FPGA工程中的引脚占用率降低范围最多可达50%~87.5%。In the paper,a circuit is proposed which is applied to the FPGA projects with multiple functional modules,so that multiple functional modules can share the bidirectional pins of FPGA.By allowing users to switch the bidirectional pins of the FPGA occupied by the functional module in real-time without obtaining the original code of the FPGA project,the application flexibility of the FPGA project after solidification is improved.By reducing the number of bidirectional pins used in FPGA,the bottleneck of the number of pins in VLSI verification applications is solved.The simulation results show that the theoretical switching delay of the circuit is up to 1 system clock.Applying this circuit to an FPGA project with 4 functional modules,the bidirectional pin occupancy rate of the FPGA can be reduced up to 75%.It’s deduced that the pin occupancy reduction range in FPGA projects containing 2~8 functional modules can reach up to 50%~87.5%.

关 键 词：双向引脚多功能复用电路 实时切换功能 VLSI验证 

分 类 号：TN914[电子电信—通信与信息系统]