基于PUF的JTAG安全认证架构  

JTAG security authentication architecture based on PUF

作　　者：王凯[1] 李校南 刘燕江 陈韬[1] 李伟[1] WANG Kai;LI Xiao-nan;LIU Yan-jiang;CHEN Tao;LI Wei(Key Laboratory of Information Security,Information Engineering University,Zhengzhou 450001,China;Unit 96901,PLA,Beijing 100094,China)

机构地区：[1]信息工程大学信息安全重点实验室,河南郑州450001 [2]96901部队,北京100094

出　　处：《计算机工程与设计》2022年第6期1501-1509,共9页Computer Engineering and Design

基　　金：国家自然科学基金项目(61404175)。

摘　　要：针对SoC的安全调试需求,提出基于SRAM-PUF的JTAG安全认证架构。分析HMAC认证协议的安全性,建立基于SRAM-PUF的密钥生成模型,提出基于模糊提取器的密钥注册和重构算法,形成基于SRAM-PUF的密钥生成器;融合HMAC协议和JTAG协议,提出基于HMAC的安全JTAG调试协议,设计JTAG扩展认证指令;基于RISC-V处理器搭建SoC安全JTAG验证平台。实验结果表明,该安全JTAG架构能够有效抵御典型JTAG攻击方式,在55 nm工艺下的面积开销仅增加73.148 KGates,最大时钟频率可达400 MHz。A JTAG security authentication architecture based on SRAM-PUF was proposed.The key generation modeling based on SRAM-PUF was established,a registration and reconstruction algorithm utilizing the fuzzy extractor was studied,and the key generation framework based on the SRAM-PUF was designed.A secure JTAG debugging protocol based on HMAC was proposed by combining the HMAC authentication protocol and JTAG debugging protocol,and the secure authentication instruction was explored.A SoC was established based on RISC-V to validate the security and efficacy of the proposed architecture.Experimental results show that the proposed architecture can resist several typical JTAG attacks,the area overhead is only 73.148 KGates in 55 nm technology,and the maximum frequency reaches 400 MHz.

关 键 词：物理不可克隆函数 哈希运算消息认证码 JTAG认证 共享密钥 模糊提取器 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]