一种功能可配置的可逆触发器设计  

A Reversible Flip-flop Design with Configurable Function

作　　者：吴钰 王伦耀[1] 储著飞[1] 夏银水[1] WU Yu;WANG Lun-yao;CHU Zhu-fei;XIA Yin-shui(Faculty of Electrical Engineering and Computer Science,Ningbo University,Ningbo,Zhejiang 315211,China)

机构地区：[1]宁波大学信息科学与工程学院,浙江宁波315211

出　　处：《电子学报》2022年第6期1466-1471,共6页Acta Electronica Sinica

基　　金：国家自然科学基金(No.61471211,No.U1709218,No.61871242);浙江省自然科学基金(No.LY19F040004);宁波市自然科学基金(No.2019A610077)。

摘　　要：不同于以往一种可逆触发器电路只能实现单一的D,T或JK触发器功能,本文在提出的3种触发器统一的次态方程基础上,设计了功能可配置的可逆单边沿和双边沿触发器.通过对输入变量的设置,提出的可逆触发器电路分别具有D,T或JK触发器逻辑功能,并能实现异步置数.提出的可逆触发器用Verilog硬件描述语言建模并用Modelsim软件仿真验证逻辑功能的正确性.相比于已有的单一功能可逆触发器,本文的可逆触发器在增加有限量子代价的基础上用单一电路实现3种不同触发器功能和异步置数.Unlike the previous reversible flip-flops(RFFs)which have a single D,T or JK flip-flop characteristic function for one circuit,an edge-triggered(including dual edge-trigged)RFF with function configurable(FCRFF)is designed based on the proposed unified characteristic equation of D,T and JK FFs.By preset some inputs of FCRFF,the proposed edge-trigged FCRFF can act as D,T and JK reversible FF and also can load data asynchronously.The functions of proposed FCRFF are approved by simulation using Modelsim after modeled with Verilog HDL.Comparing with those published D,T and JK reversible FFs,the proposed FCRFF can combine D,T and JK reversible FFs’functions into one circuit and have asynchronous data loading function additionally only with a few quantum cost increasing.

关 键 词：可逆逻辑 可逆触发器 可逆双边沿触发器 可逆时序电路 

分 类 号：TP331.1[自动化与计算机技术—计算机系统结构]