应用于sigma-delta ADC的DEM电路设计  

DEM circuit design for sigma-delta ADC

作　　者：马迅[1] 王尧 MA Xun;WANG Yao(The 54th Research Institute of CETC)

机构地区：[1]中国电子科技集团公司第五十四研究所

出　　处：《中国集成电路》2022年第6期56-59,共4页China lntegrated Circuit

摘　　要：尽管多比特量化调制器能够实现更高性能的数据转换,并且使整个系统的噪声降低,功耗得到有效控制,但是sigma-delta数模转换器的一个明显缺点是输出线性误差受器件匹配程度制约[1],本文提出一种动态元件匹配(Dynamic Element Matching,DEM)电路设计方法,可减小数模转换器电容网络产生的误差,改善谐波失真。Although the multi-bit quantization modulator can achieve data conversion with higher performance,and reduce the noise of the whole system and effectively control the power consumption,an obvious disadvantage of sig-ma-Delta digital-to-analog converter is that the output linear error is restricted by the degree of device matching[1].In this paper,a Dynamic Element Matching(DEM)circuit design method is proposed,which can reduce the errors caused by the capacitance network of the digital-to-analog converter and improve the harmonic distortion.

关 键 词：Sigma-delta数模转换器 线性误差 动态元件匹配 

分 类 号：TN432[电子电信—微电子学与固体电子学]