一种采用低阈值技术实现的高速模数转换器  

A High Speed ADC Using Low Threshold Technology

作　　者：曾涛 郭亮 侯江 廖望 陈雪 王国强[1] 黄晓宗[1] ZENG Tao;GUO Liang;HOU Jiang;LIAO Wang;CHEN Xue;WANG Guoqiang;HUANG Xiaozong(The 24th Research Institute of China Electronics Technology Group Corp.,Chongqing 400060,P.R.China)

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《微电子学》2022年第2期206-210,共5页Microelectronics

摘　　要：在0.35μm标准CMOS工艺下实现了一款采用低阈值技术的高速流水线模数转换器。该转换器包括采样保持电路、流水线ADC核、时钟电路和基准电路。相比于传统电路,该模数转换器中采样保持电路的放大器采用了低阈值设计技术。其优势在于,在特定工艺下,通过低阈值器件补偿放大器可实现高增益带宽,提高了模数转换器的速度。同时,设计了一种全新的保护电路,可有效保证电路的正常工作。采用一种独特的偏置电路设计技术,不仅能够优化跨导放大器的增益和带宽,还可以调节MOS器件工作状态。转换器采用4 bit+8×1.5 bit+3 bit的十级流水线架构,实现了14位精度的模数转换功能。在5 V电源100 MHz时钟下,仿真结果表明,SINAD为74.76 dB,SFDR为87.63 dBc,面积为5 mm×5 mm。A high speed pipelined ADC using low threshold technology was implemented in a 0.35μm standard CMOS process.The ADC included sample and hold circuits,a pipelined ADC core,clock circuits and reference circuits.Compared with traditional circuits,the amplifier of sample and hold circuit had adopted low threshold technology,and the advantage was that it used a low threshold device to compensate the amplifier based on a specific process.So a high gain bandwidth was achieved,and the speed of ADC had increased.Simultaneously,a new protection circuit was designed to effectively ensure the normal operation.An unique design technology in bias circuit could not only optimize the gain and bandwidth of the transconductance amplifier,but also adjust the working status of the MOS device.The architecture of the converter with a realized 14-bit resolution from analog to digital signal was 10 stage pipelined structure that consisted of 4 bit+8×1.5 bit+3 bit.Under the conditions of 5 V supply and 100 MHz clock,the simulation results showed that SINAD was 74.76 dB,and SFDR was 87.63 dBc.The chip area was 5.0 mm×5.0 mm.

关 键 词：流水线ADC 低阈值技术 保护电路 偏置电路 

分 类 号：TN792[电子电信—电路与系统]