一种用于高精度SAR ADC的采样失真消除电路  

A Sampling Distortion Cancellation Circuit for High Precision SAR ADC

作　　者：陈尚存 邓红辉 陈超超 尹勇生 CHEN Shangcun;DENG Honghui;CHEN Chaochao;YIN Yongsheng(School of Microelectronics,Hefei University of Technology,Hefei 230601,P.R.China)

机构地区：[1]合肥工业大学微电子学院,合肥230601

出　　处：《微电子学》2022年第2期265-269,共5页Microelectronics

基　　金：安徽高校协同创新项目(PA2019AGXC0127)。

摘　　要：提出了一种新型双板采样的采样失真消除电路,可用于16位差分型高精度SAR ADC。为了消除采样开关导通电阻导致的信号失真,该采样失真消除电路由器件尺寸成比例关系的两条采样路径组成,通过两条路径作差将差分两端的误差电荷相互抵消。相较于传统的顶板采样或底板采样,双板采样放大了差分输入信号的幅值,避免了电荷作差造成的信号衰减。仿真结果表明,在1 MS/s的采样率下,对于300 kHz的正弦输入信号,该采样失真消除电路的总谐波失真降低了15 dB,无杂散动态范围提高了19 dB,采样电路的信噪比为112 dB。A novel sampling distortion cancellation circuit utilizing dual-plate sampling for high-precision differential SAR ADCs was proposed. To eliminate the signal distortion caused by the sampling switch’s on-resistance, the sampling circuit consisted of two paths, whose components’ size were proportional to the other, and the error charges of two ends of the differential were cancelled by subtraction between the two paths. Compared with traditional top-plate sampling or bottom-plate sampling, the dual-plate sampling amplified the amplitude of differential input, avoiding the attenuation of the input caused by the subtracting. Simulation results showed that the THD of the proposed sampling distortion cancellation circuit was reduced by 15 dB and the SFDR was increased by 19 dB at 1 MS/s sampling rate and 300 kHz sinusoidal input signal. The SNR of the sampling circuit was 112 dB.

关 键 词：SAR ADC 高精度 采样电路 失真消除 

分 类 号：TN792[电子电信—电路与系统]