基于DDS技术的波形发生器ROM压缩优化算法  

Optimal algorithm of waveform generator ROM compression based on DDS technology

作　　者：王俊浩 张小玲[1] 谢雪松[1] 王万斌 Wang Junhao;Zhang Xiaoling;Xie Xuesong;Wang Wanbin(Laboratory of Microelectronics Reliability,Beijing University of Technology,Beijing 100124,China)

机构地区：[1]北京工业大学微电子可靠性研究室,北京100124

出　　处：《电子测量技术》2022年第7期82-87,共6页Electronic Measurement Technology

摘　　要：针对DDS芯片因存储空间开销大导致功耗增加,可靠性降低的问题,设计了一种对直接数字频率合成(DDS)波形发生器在现场可编程门阵列(FPGA)上的ROM存储空间压缩优化算法。在不改变波形精度的前提下,通过存储幅度序列的相对增量来减少波形数据位宽的方式对ROM进行压缩,再利用幅度累加器就可以还原出真实的幅度序列。在Quartus Ⅱ 13.0开发环境下搭建工程,并在FPGA开发板上测试通过。经过测试,该DDS信号发生器可产生5种不同的波形,共占据存储空间9 240 bit。结果表明,这种DDS优化算法比传统DDS波形发生器节省资源96%以上,能够减少系统功耗,提高系统运行速度。Aiming at the problem of increased power consumption and reduced reliability of DDS chips due to large storage space overhead, a ROM storage space compression optimization for direct digital frequency synthesis(DDS) waveform generators on field programmable gate arrays(FPGA) was designed. algorithm. Under the premise of not changing the waveform precision, the ROM is compressed by storing the relative increment of the amplitude sequence to reduce the waveform data bit width, and then the amplitude accumulator can be used to restore the real amplitude sequence. Build the project in the Quartus Ⅱ 13.0 development environment and pass the test on the FPGA development board. After testing, the DDS signal generator can generate five different waveforms, occupying a total of 9 240 bit storage space. The results show that this DDS optimization algorithm saves more than 96% of resources compared with the traditional DDS waveform generator, which can reduce the system power consumption and improve the system running speed.

关 键 词：直接数字频率合成 现场可编程门阵列 存储空间压缩 

分 类 号：TN06[电子电信—物理电子学]