AVS2快速帧内模式决策VLSI结构设计与实现  

VLSI Architecture Design and Implementation of AVS2 Fast Intra Mode Decision

作　　者：谢豪 许东芳[1] 陈杰[1] 廖成晋 崔敖 Xie Hao;Xu Dongfang;Chen Jie;Liao Chengjin;Cui Ao(Science and Technology on Reactor System Design Technology Laboratory Nuclear Power Institute of China,Chengdu,Sichuan 610213)

机构地区：[1]中国核动力研究设计院核反应堆系统设计技术国家级重点实验室,四川成都610213

出　　处：《中国仪器仪表》2022年第5期77-81,共5页China Instrumentation

摘　　要：AVS2是由中国数字音视频编解码技术标准工作组独立提出的一种视频编码标准。帧内编码是AVS2的关键技术之一。在帧内编码中,AVS2采取了33种帧内预测模式,使得编码性能显著提高,但是计算复杂度急剧增加。通常,针对CPU平台的软件编码器的快速算法研究一般直接考虑算法本身的复杂度,但针对硬件编码器产品的快速算法研究同时还需要考虑到数据依赖性等问题。有效的帧内模式决策算法一直在被不断的研究和优化中,目前国际上针对国际标准如H.265/HEVC等编码器产品的帧内快速算法研究已经比较成熟,而针对我国自主视频编码标准AVS2产品的有效帧内快速算法很少,特别是针对AVS2的硬件编码器帧内模式决策快速算法几乎没有,这显然不利于AVS2编码器的应用和推广,可见对AVS2帧内快速模式决策算法的研究非常必要。基于算法;的提出,本文提出了面向VLSI的帧内预测模块的微结构设计。为了满足300MHz时钟频率下对1920×1080@60fps的吞吐率要求,本文采用了两套并行电路进行设计。一套单独完成256个4×4尺寸PU的预测(LCU级),另一套串行完成其他尺寸精简后的预测电路。通过Vivado HLS综合报告分析,仅使用Xilinx FPGA XC7K325T 900开发板28%的LUT、3%的FF及1%的BPRAM便达到了设计要求。AVS2 is a video coding standard independently proposed by the China Digital Audio and Video Codec Technology Standard Working Group.Intra-frame coding is one of the key technologies of AVS2.In intra-frame coding,AVS2 adopts 33 intra-frame prediction modes,which significantly improves the coding performance,but the computational complexity increases dramatically.Usually,fast algorithm research for software encoders for CPU platforms generally directly considers the complexity of the algorithm itself,but fast algorithm research for hardware encoder products also needs to consider issues such as data dependencies.Effective intra-frame mode decision algorithms have been continuously researched and optimized.At present,the research on fast intra-frame algorithms for international standards such as H.265/HEVC and other encoder products is relatively mature.There are few effective intra-frame fast algorithms for AVS2 products,especially for AVS2 hardware encoder intra-frame mode decision fast algorithms,which are obviously not conducive to the application and promotion of AVS2encoders.Research is very necessary.Based on the algorithm;,this paper proposes the microstructure design of the VLSI-oriented intra prediction module.In order to meet the throughput requirement of 1920×1080@60fps under the clock frequency of 300MHz,this paper adopts two sets of parallel circuits to design.One set completes the prediction of 2564×4 size PUs(LCU level)separately,and the other set completes the prediction circuits with other sizes reduced in series.Through the analysis of the Vivado HLS synthesis report,only 28%of the LUT,3%of the FF and 1%of the BPRAM of the Xilinx FPGA XC7K325T 900 development board are used to meet the design requirements.

关 键 词：AVS2 帧内预测 VLSI 

分 类 号：TN919.81[电子电信—通信与信息系统]