相干光接收机时钟恢复算法的FPGA实现  

FPGA implementation of clock recovery algorithm for coherent optical receiver

作　　者：金鑫 杨奇 敖学渊 张深茂 JIN Xin;YANG Qi;AO Xueyuan;ZHANG Shenmao(School of Optical and Electronic Information,Huazhong University of Science and Technology,Wuhan 430074,China)

机构地区：[1]华中科技大学光学与电子信息学院,武汉430074

出　　处：《遥测遥控》2022年第4期106-112,共7页Journal of Telemetry,Tracking and Command

基　　金：国家重点研发计划项目(2018YFB1801303)。

摘　　要：低轨小卫星在进行相干激光通信时,需要实时解决发射端与相干光接收机之间存在的时钟偏差问题。分析了时钟偏差对相干光接收机性能的影响,设计了一种基于Gardner算法的并行化时钟恢复反馈环路来对时钟的偏差进行纠正,对各组成部分的原理进行了说明,并在现场可编程逻辑门阵列FPGA上实现了该算法,将5 GSa/s的采样信号在FPGA中以156.25 MHz主频,分为并行32路完成时钟同步处理,且实时时钟同步算法仅占用FPGA的590个自适应逻辑块和4个乘法器单元。同时,采用自研的集成化相干光通信模块,演示了10 Gb/s偏振复用正交相移键控PM-QPSK相干光通信系统实验。实验结果证明该方案能稳定地补偿本地采样时钟的频率和相位偏移带来的采样定时误差。以7%开销硬判决前向纠错码HD-FEC(Hard Decision Forward Error Correction)为门限,系统的灵敏度优于–51 dBm。When low-orbit small satellites carry out coherent laser communication,it is necessary to solve the clock deviation problem between the transmitter and the coherent optical receiver in real time.In this paper,the influence of clock deviation on the performance of coherent optical receiver is analyzed,a parallelized clock recovery feedback loop based on Gardner algorithm is designed to correct the clock deviation,and the principle of each component is explained.The algorithm is implemented on FPGA by dividing the 5 GSa/s sampling signals into 32 parallel channels in the FPGA with the main frequency of 156.25 MHz to complete the clock synchronization processing,and the real-time clock synchronization algorithm only occupies 590 adaptive logic blocks and 4 multiplier units of the FPGA.At the same time,the self-developed integrated coherent optical communication module was used to demonstrate the 10 Gb/s PM-QPSK coherent optical communication system experiment.The experimental results show that the scheme can stably compensate the sampling timing error caused by the frequency and phase offset of the local sampling clock.The HD-FEC(Hard Decision Forward Error Correction)code with 7%overhead is used as the threshold,the sensitivity of the system is better than–51 dBm.

关 键 词：相干接收机 时钟恢复 GARDNER算法 FPGA 

分 类 号：TN929.11[电子电信—通信与信息系统]