基于动态卡诺图对时序逻辑电路设计方法的优化  

Optimization of Sequential Logic Circuit Design Method Based on Dynamic Karnaugh Map

作　　者：王芳[1] 黄德聪 裴楠 杨千城 邹雨欣 Wang Fang;Huang Decong;Pei Nan;Yang Qiancheng;Zou Yuxin(Drama&Film Academy,Zhejiang Vocational Academy of Art,Hangzhou 310053,China;College of Information Engineering,Zhejiang University of Technology,Hangzhou 310014,China)

机构地区：[1]浙江艺术职业学院戏剧影视学院,杭州310053 [2]浙江工业大学信息工程学院,杭州310023

出　　处：《科技通报》2022年第5期27-30,共4页Bulletin of Science and Technology

基　　金：浙江省省属高校基本科研业务费资助(项目编号:QNTD20210006);浙江艺术职业学院2021年青年教师科研团队培育项目研究成果。

摘　　要：在传统数字电路设计中,在保证逻辑功能正确的前提下,尽可能简化逻辑函数表达式以获得最简的电路。在目前国内的一些主要教材中,介绍时序逻辑电路设计时,当获得触发器的状态方程后,都是将状态方程和所选用的触发器的特性方程进行人为比较,得到触发器的驱动方程,这样获得的激励函数并不能保证一定是最简的,常常还需要进行某些修正。本文提出动态卡诺图的概念,利用触发器的状态变化来填写卡诺图,给出了J、K触发器的动态卡诺图化简技术和设计方法,这种设计方法解决了传统时序电路设计中卡诺图画包围圈不能遵循包围圈最大原则的问题。In the traditional digital circuit design, the expression of logic function is simplified as far as possible to obtain the simplest circuit under the premise of ensuring the correct logic function. When the state equation of the flip-flop is obtained, the comparison between the state equation and the characteristic equation of the flip-flop is carried out artificially when the design of the flip-flop is introduced in the main textbooks of the sequential logic at present, the driver equation of the flip-flop is obtained, so that the excitation function can not be guaranteed to be the simplest, often also need to make some modifications. In this paper, the concept of Dynamic Karnaugh map is put forward, the state change of flip-flop is used to fill in Karnaugh map, and the simplification technique and design method of Dynamic Karnaugh map of J and k flip-flop are given, this design method solves the problem that the traditional sequential circuit design can not follow the maximum principle of Carnot’s circle.

关 键 词：时序逻辑电路 动态卡诺图 驱动方程 状态方程 

分 类 号：TP332.1[自动化与计算机技术—计算机系统结构]