基于FPGA的多目标数字图像模拟器  

Multi-object Digital Image Simulator Based on FPGA

作　　者：张维达[1] 张甫恺[1] 邹悦 张秒 ZHANG Wei-da;ZHANG Fu-kai;ZOU Yue;ZHANG Miao(Changchun Institute of Optics,Fine Mechanics and Physics,Chinese Academy of Sciences,Changchun 130033,China)

机构地区：[1]中国科学院长春光学精密机械与物理研究所,吉林长春130033

出　　处：《仪表技术与传感器》2022年第6期95-98,104,共5页Instrument Technique and Sensor

基　　金：国家自然科学基金面上项目(51675506);科技部国家重点研发计划项目(2018YFF01011503)。

摘　　要：多目标跟踪是当前数字图像处理系统的主要研究方向之一,为了验证多目标数字图像处理器的跟踪性能,设计了具有标准Camera Link协议数字图像输出能力的多目标数字图像模拟器。采用XC7K160T FPGA作为数字图像模拟器的核心逻辑控制单元,利用FPGA端的并行处理能力,生产多个伪随机数发生器,实现10个图像目标轨迹的随机独立规划。数字图像模拟器利用串并转换接口,将FPGA生成的数字图像转换为符合Camera Link协议标准的差分数字信号,数字图像的输出像素时钟提高至85 MHz,能够在1920×1080分辨率情况下,输出最高帧频400 Hz的8 bit位深灰度的数字图像。采用串口实时输出当前图像中目标的位置信息,用于检验后端数字图像处理器对目标提取的准确性以及处理延迟时间。Multi-objective tracking is one of the main research directions of the current digital image processing system,in order to verify the tracking performance of the multi-target digital image processor,a multi-target digital image simulator with a standard Camera Link protocol digital image output capability was designed.Using XC7K160T FPGA as the core logic control unit of the digital image simulator,using the parallel processing capability of the FPGA,multiple pseudo-random number generators were produced,independent planning trajectories of 10 targets were realized.The digital image simulator used a high speed serial interface to convert the digital image generated by the FPGA into a differential digital signal conforming to the Camera Link protocol standard,the output pixel clock of the digital image was 85 MHz,and the resolution was 1920×1080.The digital image has 8 bit bit gray level at the highest frame rate 400 Hz.The serial port was used to output the location information of the target in the current image in real time for verifying the accuracy of target extraction and the processing delay time of the back-end digital image processor.

关 键 词：多目标 数字图像源 高帧频 随机位序列生成器 Camera Link FPGA 

分 类 号：TN791[电子电信—电路与系统]