FPGA-based hardware-in-the-loop for multi-domain simulation  

作　　者：Abdelouahab D.Benhamadouche Farid Djahli Adel Ballouti Abdeslem Sahli 

机构地区：[1]Department of Electronic,University Ferhat Abbas Setif 1 Setif 19000,Algeria [2]Faculty of Technology,University Mohamed Boudiaf of M’Sila M’Sila 28000,Algeria

出　　处：《International Journal of Modeling, Simulation, and Scientific Computing》2019年第4期20-37,共18页建模、仿真和科学计算国际期刊（英文）

摘　　要：In this paper,we present a new approach for complex system design,which allows rapid,efficient and low-cost prototyping.This approach can simplify designing tasks and go faster from system modeling to effective hardware implementation.Designing multi-domain systems requires different engineering competences and several tools,our approach gives a unique design environment,based on the use of VHDL-AMS modeling language and FPGA device within the same design tool.This approach is intended to enhance hardware-in-the-loop(HIL)practices with a more realistic simulation which improve the verification process in the system design flow.This paper describes the implementation of a software/hardware platform as a practical support for our approach,the feasibility and the benefits of this approach are demonstrated through a practical case study for power converter control.The obtained results show that the developed method achieves significant speed-up compared with conventional simulation,with a minimum used resources and minimum latency.

关 键 词：Hardware-in-the-loop(HIL)simulation multi-domain system verification system control field-programmable gate array(FPGA) VHDL-AMS 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术]