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作 者:Samar Nour Sameh A.Salem Shahira M.Habashy
机构地区:[1]Department of Computer and Systems Engineering,Faculty of Engineering,Helwan University,Cairo,11792,Egypt [2]Egyptian Computer Emergency Readiness Team(EG-CERT),National Telecom Regulatory Authority(NTRA),Cairo,12577,Egypt
出 处:《Computers, Materials & Continua》2022年第3期4447-4466,共20页计算机、材料和连续体(英文)
摘 要:Recently,Multicore systems use Dynamic Voltage/Frequency Scaling(DV/FS)technology to allow the cores to operate with various voltage and/or frequencies than other cores to save power and enhance the performance.In this paper,an effective and reliable hybridmodel to reduce the energy and makespan in multicore systems is proposed.The proposed hybrid model enhances and integrates the greedy approach with dynamic programming to achieve optimal Voltage/Frequency(Vmin/F)levels.Then,the allocation process is applied based on the availableworkloads.The hybrid model consists of three stages.The first stage gets the optimum safe voltage while the second stage sets the level of energy efficiency,and finally,the third is the allocation stage.Experimental results on various benchmarks show that the proposed model can generate optimal solutions to save energy while minimizing the makespan penalty.Comparisons with other competitive algorithms show that the proposed model provides on average 48%improvements in energy-saving and achieves an 18%reduction in computation time while ensuring a high degree of system reliability.
关 键 词:ENERGY-EFFICIENCY safe voltage multicore processors core utilization dynamic voltage/frequency scaling MAKESPAN
分 类 号:TP391[自动化与计算机技术—计算机应用技术]
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