基于电压阈值忆阻器SPICE模型的加法器电路设计  

Design of an Adder Circuit Based on Novel Threshold Memristor SPICE Model

作　　者：黄丽莲[1] 朱耿雷 项建弘[1] 张春杰[1] 李文亚 HUANG Lilian;ZHU Genglei;XIANG Jianhong;ZHANG Chunjie;LI Wenya(College of Information and Communication Engineering,Harbin Engineering University,Harbin 150001,China)

机构地区：[1]哈尔滨工程大学信息与通信工程学院,哈尔滨150001

出　　处：《实验室研究与探索》2022年第5期73-77,158,共6页Research and Exploration In Laboratory

基　　金：2017年黑龙江省教育教学改革项目(SJGY20170515);2019年哈尔滨工程大学本科教学改革研究项目(JG2019B69);2020年黑龙江省教学改革项目(SJGY20200147)。

摘　　要：针对逻辑电路的应用设计了一种功能完整的电压阈值忆阻器SPICE模型,并对其进行实验测试与验证。利用电压阈值忆阻器SPICE模型搭建了MRL(忆阻比例逻辑门)和多功能忆阻模块,运用在搭建加法器中,设计了一种基于电压阈值忆阻器的加法器电路,并对此加法器进行实验验证与性能分析。实验结果与性能分析表明,基于电压阈值忆阻器的加法器电路不仅能实现正确的逻辑运算,而且能提高器件面积的利用率和逻辑运算效率,比传统的加法器减少了87.6%功耗。The logic circuit based on memristor is an important research direction of memristor.Firstly,aiming at the application of logic circuit,a SPICE model of voltage threshold memristor with complete function is designed,and its experimental test and verification are carried out.Then MRL(memristor ratioed logic)and multi-functional memristor module are constructed by the SPICE model of the voltage threshold memristor,and an adder based on the voltage threshold memristor is designed.Finally,the experimental verification and performance analysis of the adder are carried out.Experimental results and performance analysis show that the proposed adder circuit can not only realize correct logic operation,but also improve the utilization of device area and logic operation efficiency and reduce the power consumption by 87.6%compared with the traditional adder.

关 键 词：电压阈值忆阻器 SPICE模型 加法器电路 

分 类 号：TN602[电子电信—电路与系统]