基于15位像素级模数转换器的640×512规格中波红外成像用48 mW数字读出电路  

A 48 mW DROIC with 15-bit pixel-level ADC for 640×512 mid-wave infrared imagers

作　　者：于善哲 张雅聪[1] 牛育泽 周晔[1] 卓毅 马丁[2] 鲁文高[1] 陈中建[1] 李向阳[2] YU Shan-Zhe;ZHANG Ya-Cong;NIU Yu-Ze;ZHOU Ye;ZHUO Yi;MA Ding;LU Wen-Gao;CHEN Zhong-Jian;LI Xiang-Yang(National Key Laboratory of Science and Technology on Micro/Nano Fabrication,School of Integrated Circuits,Peking University,Beijing 100871,China;Key Laboratory of Infrared Imaging Materials and Detectors,Shanghai Institute of Technical Physics,Chinese Academy of Sciences,Shanghai 200083,China)

机构地区：[1]北京大学集成电路学院微米/纳米加工技术国家级重点实验室,北京100871 [2]中国科学院上海技术物理研究所中科院红外成像材料与器件重点实验室,上海200083

出　　处：《红外与毫米波学报》2022年第4期785-791,共7页Journal of Infrared and Millimeter Waves

基　　金：Supported by the National Key Research and Development Program of China(2021YFA0715503);the Open Foundation of Key Laboratory of Infrared Imaging Materials and Detectors Shanghai Institute of Technical Physics;Chinese Academy of Sciences。

摘　　要：提出了一种用于中波红外成像的基于15位像素级单斜率模数转换器的低功耗数字读出电路。像素级模数转换器采用一种新型功耗自适应的脉冲输出型比较器,只有当斜坡电压信号接近积分电压时,比较器才产生功耗。此外,比较器输出脉冲信号,降低了15位量化结果存储器上消耗的动态功耗。该存储器采用三管动态结构,仅占约54μm^(2)面积,以满足15μm像素中心距的面积约束。量化结果以电流模式读出到列级,避免相邻列总线间的电压串扰。基于0.18μm CMOS工艺,采用该结构,设计并制造了640×512规格的数字读出电路。测试结果表明,在120 Hz的帧频下,功耗仅为48 mW,总积分电容为740 fF,电荷处理能力为8.8 Me^(-)。在满阱状态,等效到积分电容的噪声电压为116μV,峰值信噪比为84 dB。A low-power digital readout integrated circuit(DROIC)with 15-bit pixel-level single-slope analog-todigital converter(ADC)for mid-wave infrared imagers is proposed.A novel pulse comparator featured powerself-adaption is presented for the pixel-level ADC to reduce power consumption.Only when the ramp signal approaches the integration voltage,there is current flowing through the comparator.Furthermore,the pulse output of the comparator also reduces dynamic power consumed by the 15-bit pixel conversion result memories.For achieving the requirement of 15μm pixel pitch,the memories adopt a 3-transistor dynamic structure and only occupy about 54μm^(2).The current mode transmission is used to read out the analog-to-digital conversion results to column for robustness against voltage crosstalk between adjacent column bus lines.The 640×512 DROIC with this structure is fabricated in 0.18μm CMOS process.The experimental results demonstrate the DROIC consumes 48 mW at 120 fps.The total integration capacitor is about 740 fF and the charge handling capacity is 8.8Me-.The equivalent noise voltage on the integration capacitor is 116μV and the peak signal-to-noise ratio is 84dB at the full well.

关 键 词：红外焦平面阵列 数字读出电路 像素级单斜率模数转换器 功耗自适应比较器 

分 类 号：TN79[电子电信—电路与系统]