一种5~6 GHz宽带全集成CMOS低噪声放大器  

A 5~6 GHz Wide-Band Fully Integrated CMOS Low Noise Amplifier

作　　者：桂小琰 赵振 常天海[3] 任志雄[3] 景磊 王祥 GUI Xiaoyan;ZHAO Zhen;CHANG Tianhai;REN Zhixiong;JING Lei;WANG Xiang(The School of Electronic and Information Engineering,Xi’an JiaoTong University,Xi’an 710049,P.R.China;The School of Microelectronics,Xi’an JiaoTong University,Xi’an 710049,P.R.China;Huawei Technologies Co.,Ltd.,Dongguan,Guangdong523808,P.R.China)

机构地区：[1]西安交通大学电信学院,西安710049 [2]西安交通大学微电子学院,西安710049 [3]华为技术有限公司,广东东莞523808

出　　处：《微电子学》2022年第3期358-362,共5页Microelectronics

基　　金：中国-北马其顿科技合作委员会第六届例会交流项目(6-6)。

摘　　要：采用55 nm标准CMOS工艺,设计并流片实现了一种应用于Wi-Fi 6(5 GHz)频段的宽带全集成CMOS低噪声放大器(LNA)芯片,包括源极退化共源共栅放大器、负载Balun及增益切换单元。在该设计中,所有电感均为片上实现;采用Balun负载,实现信号的单端转差分输出;具备高低增益模式,以满足输入信号动态范围要求。测试结果表明,在高增益模式下该放大器的最大电压增益为20.2 dB,最小噪声系数为2.2 dB;在低增益模式下该放大器的最大电压增益为15 dB,最大输入1 dB压缩点为-3.2 dBm。芯片核心面积为0.28 mm~2,静态功耗为10.2 mW。A fully integrated low noise amplifier(LNA) for Wi-Fi 6(5 GHz) was designed and implemented in a 55 nm standard CMOS process. The design included a source-degenerate cascode amplifier, a balun and a gain switching cell. All inductors were realized on chip. A balun was adopted as the load to perform the single-to-differential conversion. In addition, in order to deal with different input power, the LNA had high gain and low gain mode. Measurement results indicated that the LNA achieved a maximum voltage gain of 20.2 dB when switched to high gain mode, and the corresponding minimum noise figure was 2.2 dB. In low gain mode, the gain was 15 dB, and the corresponding maximum input-1 dB compression point was-3.2 dBm. The chip occupies a core area of 0.28 mm~2, and the static power consumption was 10.2 mW.

关 键 词：低噪声放大器 巴伦 高低增益模式 Wi-Fi 6 

分 类 号：TN722.3[电子电信—电路与系统] TN432