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作 者:邢钊 刘辉华[1] 康凯[1] XING Zhao;LIU Huihua;KANG Kai(Wireless Technology and Integrated System Lab.,Univ.of Elec.Sci.and Technol.of China,Chengdu 611731,P.R.China)
机构地区:[1]电子科技大学无线技术与集成系统实验室,成都611731
出 处:《微电子学》2022年第3期363-366,共4页Microelectronics
基 金:国家重点研发计划资助项目(2020YFB1805003,2019YFB1706802);国家自然科学基金资助项目(61931007,62025106)。
摘 要:基于0.18μm CMOS工艺,设计并制作了一种偏置电路噪声消除的VCO。通过在偏置电路与VCO的尾电流源之间插入选通电路,可以实现对偏置电路的噪声电压的低通滤波。分析表明,该低通滤波器的拐点频率与选通电路的导通电阻、关断电阻以及开关时钟占空比相关。电路测试表明,加入选通电路之后,VCO的近端相噪下降约20 dB,大大降低了偏置电路的相噪贡献。A bias-Fat-circuit-noise cancellation VCO was designed and fabricated in a 0.18μm CMOS process.By inserting a strobe circuit between the bias circuit and the VCO core,the noise voltage from the bias circuit could be low-pass filtered.Analyses showed that the corner frequency of the low-pass filter was dependent on the turn-on resistance and turn-off resistance of the strobe circuit as well as the duty cycle of the switching clock.Measurement results showed that with the assistance of the strobe circuit,the near-end phase noise of the VCO was reduced by 20 dB approximately,exhibiting a significant suppression for flicker noise from the bias circuit.
分 类 号:TN752[电子电信—电路与系统]
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