高速数字电路PDN与PSIJ联合分析  

The Co-analysis of PDN and PSIJ in High Speed Digital Circuit

作　　者：孙茵 叶凌云[2] Sun Yin;Ye Lingyun

机构地区：[1]之江实验室 [2]浙江大学

出　　处：《安全与电磁兼容》2022年第5期23-27,共5页Safety & EMC

摘　　要：阐述了高速数字电路电源分配网络(PDN)与电源噪声引发的时序抖动(PSIJ)联合分析方法。介绍了一种新的PDN目标阻抗定义方式,通过对PDN等效电路模型与电路PSIJ敏感度特性进行分析,推导高速电路PSIJ与PDN电路参数(包括电阻、电感与电容)的关系,建立联合分析方法,并简述了基于PSIJ的PDN优化算法。The co-analysis of power distribution network(PDN)and power supply induced jitter(PSIJ)in high speed digital circuit is described.By improving the concept of target impedance and analyzing the PDN equivalent circuit and driver PSIJ sensitivity,the formulation between PSIJ and PDN R-L-C parameters is derived.Based on this relationship,the co-analysis methodology is established.The jitter-aware PDN optimization method is also demonstrated.

关 键 词：电源分配网络 电源噪声引发的时序抖动 目标阻抗 高速数字电路 

分 类 号：TN79[电子电信—电路与系统]