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作 者:李建立 莫燕南 粟涛 陈弟虎 Li Jianli;Mo Yannan;Su Tao;Chen Dihu(School of Electronics&Information Technology,Sun Yat-Sen University,Guangzhou 510006,China)
机构地区:[1]中山大学电子与信息工程学院,广州510006
出 处:《计算机应用研究》2022年第9期2818-2825,2831,共9页Application Research of Computers
基 金:广东省重大科技计划资助项目(2021B110127007)。
摘 要:随着电子信息技术的快速发展,数据的安全性问题日益严峻,传统单一制密码算法在安全性与运算速率上已不能满足要求。为了解决大数据时代下所提出的加密需求,提出了一种基于国密算法SM2、SM3、SM4的高速混合加密系统的硬件设计方案,并针对SM2和SM4算法的底层硬件结构进行优化。对SM2算法采用Karatsuba Ofman模乘器与点运算并行方案进行优化。对SM4算法提出了一种基于复合域S盒的二次流水全展开硬件架构。实验结果表明,该系统所实现的各算法电路均具有较高性能。SM2的点乘时间缩短至68.37μs;SM3的杂凑值生成仅需0.71μs;SM4吞吐率最高达53.76 Gbps。相比同等安全性的SM2算法,该混合系统在加密时间上减小了26.67%,具有实用价值。与相关工作进行对比分析,可证明该方案在安全性和加/解密性能上均有一定优势。With the rapid development of electronic information technology,the security of data has become increasingly serious.The traditional single cipher algorithm cannot meet the requirements any more.In order to solve these problems,this paper proposed a hardware design scheme of high-speed hybrid encryption system based on SM2,SM3,SM4,in which the hardware structure of SM2 and SM4 algorithms was optimized.Besides,this paper optimized the SM2 algorithm with Karatsuba-Ofman modular multiplier and parallel with point operation.For SM4 algorithm,this paper designed a subpipelining hardware architecture bas on composite field S-box so as to improve its throughout.The experimental results show that all the algorithm circuits implemented by the system have high performance:the point multiplication time of SM2 is 68.37μs;the hash generation of SM3 only take 0.71μs;the throughput of SM4 is up to 53.76 Gbps.Compared with the SM2 algorithm with the same security,this hybrid system has 26.67%less encryption time.By comparing and analyzing with related work,it can be proved that this scheme has certain advantages in security and encryption and decryption performance.
关 键 词:SM2公钥密码算法 SM4分组加密算法 硬件设计 混合加密
分 类 号:TP391[自动化与计算机技术—计算机应用技术]
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