DSP+FPGA的双核串行通信系统设计与实现  

DSP+FPGA dual-core serial communication system design and implementation

作　　者：胡汉昌 王茂森[1] 戴劲松[1] Hu Hanchang;Wang Maosen;Dai Jinsong(Nanjing University of Science and Technology,Nanjing 210094,China)

机构地区：[1]南京理工大学,南京210094

出　　处：《国外电子测量技术》2022年第8期125-132,共8页Foreign Electronic Measurement Technology

摘　　要：针对小型化数字信号处理器(DSP)+现场可编程逻辑门阵列(FPGA)数据采集及处理装置中DSP与FPGA之间的通信,为实现两者在硬件连接的简便性和软件通信的灵活性,提出了一种基于扩展的串行外设接口(SPI)构建DSP与FPGA之间的数据交互通道设计方案,并在此基础上设计且实现了DSP+FPGA的双核串行通信系统。该通信系统使从机FPGA能够主动开启SPI通信;并使SPI通信具有单独发送或传输数据的能力,提高了SPI通信的灵活性;同时具有硬件连接简便的特点,降低了设计电路板布局走线的难度。满足了在保证高速灵活通信的前提下缩小电路板面积的设计需求。并通过实验证明了该系统运行性能稳定,且通信速率可达到10.714 Mbps。For the communication between digital signal processor(DSP) and field programmable logic gate array(FPGA) in the miniaturized DSP + FPGA data acquisition and processing device, in order to realize the simplicity of hardware connection and the flexibility of software communication between them, a design scheme is proposed to build the data interaction channel between DSP and FPGA based on the extended serial peripheral interface(SPI) port. Based on this, a dual-core serial communication system of DSP+FPGA is designed and implemented. The communication system enables the slave FPGA to initiate SPI communication;and enables SPI communication with the ability to send or transmit data separately, which improves the flexibility of SPI communication;at the same time, it has the feature of easy hardware connection, which reduces the difficulty of designing board layout alignment. It meets the design requirements of reducing the board area while ensuring high-speed and flexible communication. The system′s stable operation performance and communication rate of 10.714 Mbps are demonstrated through experiments.

关 键 词：FPGA DSP SPI 通信扩展 灵活性 

分 类 号：TN919.6[电子电信—通信与信息系统]