Implementation of an 8-bit bit-slice AES S-box with rapid single flux quantum circuits  

作　　者：Ruo-Ting Yang Xin-Yi Xue Shu-Cheng Yang Xiao-Ping Gao Jie Ren Wei Yan Zhen Wang 杨若婷;薛新伊;杨树澄;高小平;任洁;严伟;王镇(State Key Laboratory of Functional Material for Informatics,Shanghai Institute of Microsystem and Information Technology,Chinese Academy of Sciences,Shanghai 200050,China;CAS Center for Excellence in Superconducting Electronics(CENSE),Shanghai 200050,China;University of Chinese Academy of Sciences,Beijing 100049,China;School of Software and Microelectronics,Peking University,Beijing 100871,China)

机构地区：[1]State Key Laboratory of Functional Material for Informatics,Shanghai Institute of Microsystem and Information Technology,Chinese Academy of Sciences,Shanghai 200050,China [2]CAS Center for Excellence in Superconducting Electronics(CENSE),Shanghai 200050,China [3]University of Chinese Academy of Sciences,Beijing 100049,China [4]School of Software and Microelectronics,Peking University,Beijing 100871,China

出　　处：《Chinese Physics B》2022年第9期604-610,共7页中国物理B（英文版）

基　　金：This work was supported by the National Natural Science Foundation of China(Grant No.92164101);the National Natural Science Foundation of China(Grant No.62171437);the Strategic Priority Research Program of the Chinese Academy of Sciences(Grant No.XDA18000000);Shanghai Science and Technology Committee(Grant No.21DZ1101000);the National Key R&D Program of China(Grant No.2021YFB0300400).

摘　　要：Rapid single flux quantum(RSFQ)circuits are a kind of superconducting digital circuits,having properties of a natural gate-level pipelining synchronous sequential circuit,which demonstrates high energy efficiency and high throughput advantage.We find that the high-throughput and high-speed performance of RSFQ circuits can take the advantage of a hardware implementation of the encryption algorithm,whereas these are rarely applied to this field.Among the available encryption algorithms,the advanced encryption standard(AES)algorithm is an advanced encryption standard algorithm.It is currently the most widely used symmetric cryptography algorithm.In this work,we aim to demonstrate the SubByte operation of an AES-128 algorithm using RSFQ circuits based on the SIMIT Nb0_(3) process.We design an AES S-box circuit in the RSFQ logic,and compare its operational frequency,power dissipation,and throughput with those of the CMOS-based circuit post-simulated in the same structure.The complete RSFQ S-box circuit costs a total of 42237 Josephson junctions with nearly 130 Gbps throughput under the maximum simulated frequency of 16.28 GHz.Our analysis shows that the frequency and throughput of the RSFQ-based S-box are about four times higher than those of the CMOS-based S-box.Further,we design and fabricate a few typical modules of the S-box.Subsequent measurements demonstrate the correct functioning of the modules in both low and high frequencies up to 28.8 GHz.

关 键 词：RSFQ AES S-BOX hardware implementation 

分 类 号：TN79[电子电信—电路与系统]