某飞行器同步数据采集存储系统设计  

Design of synchronized data acquisition and storage system for an aircraft

作　　者：孟园 李孟委 张鹏[1,2] MENG Yuan;LI Mengwei;ZHANG Peng(School of Instrument and Electronics,North University of China,Taiyuan 030051,China;National Key Laboratory for Electronic Measurement Technology,North University of China,Taiyuan 030051,China)

机构地区：[1]中北大学仪器与电子学院,山西太原030051 [2]中北大学电子测试技术国家重点实验室,山西太原030051

出　　处：《电子设计工程》2022年第20期44-50,55,共8页Electronic Design Engineering

基　　金：国家“173”项目(2020-JCJQ-ZD-043)。

摘　　要：文中针对某飞行器边界层温度、压力等参数的获取与记录,设计一种基于FPGA和eMMC的多通道同步数据采集存储系统,解决了传统采存系统中存在的存储速度低、存储容量小、测量误差大等问题。该系统选用AD7606模数转换芯片实现对8通道模拟信号的同步采集,单通道采样频率可达200 kHz;采用DDR3 SDRAM作为高速缓存单元;以单片eMMC为存储介质,存储容量为128 GB,高速SDR速度模式下数据读写速率最高可达50 MB/s。实验测试结果表明,该系统能够在单通道200 kHz采样频率的条件下,完成对8通道模拟信号的同步采集和存储,工作时间可达10 h以上,误差范围可控制在0.2%以内,具有一定的工程应用价值。This paper designs a multi-channel synchronous data acquisition and storage system based on FPGA and eMMC for the acquisition and recording of temperature,pressure and other parameters in the boundary layer of an aircraft,which solves the problems of low storage speed,small storage capacity and large measurement errors in the traditional acquisition and storage system. The system uses AD7606analog-to-digital converter chip to achieve synchronous acquisition of 8 channels of analog signals with a single-channel sampling frequency up to 200 kHz;DDR3 SDRAM is used as the cache unit;a singlechip eMMC is used as the storage medium with a storage capacity of 128 GB,the data read and write rate in high-speed SDR speed mode is up to 50 MB/s. Experimental test results show that the system can complete the synchronous acquisition and storage of 8 channels of analog signals under the condition of single-channel 200 kHz sampling frequency,and the working time can reach more than 10 hours,and the error range can be controlled within 0.2%,which has certain engineering application value.

关 键 词：FPGA 数据采集存储 DDR3 eMMC 

分 类 号：TN919[电子电信—通信与信息系统]