高速率通信用线列探测器芯片设计  

Study on Line Array Detector Chip for High Rate Communication

作　　者：徐道润[1] 肖入彬 王立 董绪丰[1] 任丽 黄晓峰[1] 崔大健[1] XU Daorun;XIAO Rubin;WANG Li;DONG Xufeng;REN Li;HUANG Xiaofeng;CUI Dajian(Chongqing Optoelectronics Research Institute,Chongqing 400060,China)

机构地区：[1]重庆光电技术研究所,重庆400060

出　　处：《电子技术（上海）》2022年第8期15-17,共3页Electronic Technology

摘　　要：阐述一款高速率阵列探测器芯片的设计,通过调整AGaAs材料中Al组分的占比,实现对芯片响应介质波长的调节,完成830~870nm谱响应范围的芯片设计。针对高速率应用,采用了台面结构设计,有效缩短载流子输运时间,利用多层DBR反射结构,指定波长范围内的反射率高达95%以上,单通道最高速率超过10GHz,峰值响应度≥0.50A/W,芯片响应度满足实际应用要求。This paper describes the design of a high-speed array detector chip.By adjusting the proportion of Al component in AlGaas material,the wavelength of the chip response medium can be adjusted,and the chip design of 830~870nm spectral response range can be completed.For highspeed applications,the mesa structure design is adopted to effectively shorten the carrier transport time,and the multilayer DBR reflection structure is used.The reflectivity within the specified wavelength range is up to 95%,the maximum rate of single channel is more than 10GHz,and the peak response is ≥0.50A/W.The chip response meets the actual application requirements.

关 键 词：电子器件 DBR结构 波长拓展 高速探测器阵列 

分 类 号：TN402[电子电信—微电子学与固体电子学] TN405[理学—粒子物理与原子核物理] O572.212[理学—物理]