宽带数字阵列可变延时补偿的FPGA模型化设计  

FPGA Modular Design of Variable Delay Compensation for Wideband Digital Array

作　　者：刘畅 陈言理 李姗姗 袁云权 杨徐路 LIU Chang;CHEN Yanli;LI Shanshan;YUAN Yunquan;YANG Xulu(Shanghai Aerospace Electronic Technology Institute,Shanghai 201109;The Military Representative Office of the Rocket Force Equipment Department in Shanghai,Shanghai 201109)

机构地区：[1]上海航天电子技术研究所,上海201109 [2]火箭军装备部驻上海地区军代室,上海201109

出　　处：《舰船电子工程》2022年第9期76-81,共6页Ship Electronic Engineering

摘　　要：在宽带雷达系统中,阵列对宽带信号进行时域波束形成时,必须引入真实时延补偿。传统模拟延迟器件成本高、体积大且精度有限,而数字延时补偿可低成本地实现连续可变的高精度时延补偿,具有较强的工程应用价值。由于宽带信号高数据率的特点,基于FPGA的数字延时补偿比DSP具有更大的实时性优势和成本优势,论文使用Xilinx公司的System Generator工具对系统进行模型化设计,通过Farrow可变分数延时滤波器和CORDIC算法等方法,在单片FPGA中实现连续可变延时补偿的功能,完成宽带数字阵列波束形成的预处理。In a wideband radar system,real time delay compensation must be introduced when the array performs time domain wave-east formation of wideband signal.Traditional analog delay devices have high cost,large volume and limited precision,while digital delay compensation can realize continuously variable high-precision delay compensation at low cost,which has strong engineering application value.Due to the characteristics of high data rate of wideband signal,digital delay compensation based on FPGA has greater real-time and cost advantages than DSP.In this paper,the modular design of the system is carried out by using the System Generator tool of Xilinx company.By using Farrow variable fractional delay filter and CORDIC algorithm,the functions of delay calculation,on-line adding of filter coefficient and variable delay compensation are realized in single chip FPGA,and the preprocessing of wideband digital array waveguide formation is completed.

关 键 词：System Generator 可变分数延时滤波器 宽带数字阵列雷达 FPGA 

分 类 号：TN95[电子电信—信号与信息处理]