Structural and electrical properties of ferroelectric BiFeO_(3)/HfO_(2) gate stack for nonvolatile memory applications  

作　　者：Nitish Yadav Kamal Prakash Pandey Pramod Narayan Tripathiy 

机构地区：[1]Department of Electronics and Communication Engineering,Shambhunath Institute of Engineering and Technology,Allahabad,Uttar Pradesh 211015,India [2]Department of Electronics and Communication Engineering,Indian Institute of Information Technology,Allahabad,Uttar Pradesh 211015,India

出　　处：《Journal of Advanced Dielectrics》2018年第5期57-63,共7页先进电介质学报（英文）

摘　　要：Difficulties in the fabrication of direct interface of ferroelectric BiFeO_(3)/HfO_(2) on the gate of ferroelectric field effect transistor(FeFET)is well known.This paper reports the optimization and fabrication of ferroelectric/dielectric(BiFeO_(3)/HfO_(2))gate stack for the FeFET applications.RF magnetron sputtering has been used for the deposition of BiFeO_(3),HfO_(2) films and their stack.X-Ray diffraction(XRD)analysis of BiFeO_(3) shows the dominant perovskite phase of(104),(110)orientation at 2θ=32°at the annealing temperature of 500℃.XRD analysis also confirms the amorphous nature of the HfO2 film at annealing temperature of 400℃,500℃ and 600℃.Multiple angle analysis shows the variation ion the refractive index between 2.98–3.0214 for BiFeO_(3) and 2.74–2.9 for the HfO2 film with the annealing temperature.Metal/Ferroelectric/Silicon(MFS),Metal/Ferroelectric/Metal(MFM),Metal/Insulator/Silicon(MIS),and Metal/Ferroelectric/Insulator/Silicon(MFIS)structures have been fabricated to obtain the electric characteristic of the ferroelectric,dielectric and their stacks.Electrical characteristics of the MFIS structure show the memory improvement from 2.7 V for MFS structure to 4.65 V for MFIS structure with 8 nm of buffer dielectric layer.This structure also shows the breakdown voltage of 40 V with data retention capacity greater than 9×10^(9)iteration cycles.

关 键 词：ENDURANCE FERROELECTRIC high-k dielectric memory window MFIS. 

分 类 号：TN3[电子电信—物理电子学]