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作 者:姚茂群[1] 薛紫微 YAO Maoqun;XUE Ziwei(School of Information Science and Technology,Hangzhou Normal University,Hangzhou 311121,China)
机构地区:[1]杭州师范大学信息科学与技术学院,浙江杭州311121
出 处:《杭州师范大学学报(自然科学版)》2022年第6期652-656,共5页Journal of Hangzhou Normal University(Natural Science Edition)
基 金:国家自然科学基金项目(61771179)。
摘 要:在诸多抗功耗分析攻击的设计方案中,电路级的对抗设计主要是通过平衡芯片在运行不同逻辑运算时所产生的功耗,消除数字电路中功耗与其所存储和计算的信息的相关性,从根本上消除功耗分析所依赖的功耗-数据相关性的物理基础.文章在研究和分析双轨预充电逻辑的基础上,提出了一种新型低功耗、低成本的功耗平衡抗攻击门电路设计,并进行了实验验证.Since PAA was proposed, there had been a variety of protective measures against it. Among the various countermeasures, some circuit-level designs aimed to balance the power assumption of a chip when conducting different logic computations. These methods eliminated the correlation between the power consumption of digital circuits and the information they computed and stored, and further removed the physical basis of power-data correlation on which power analysis dependents. Based on the study and analysis of dual-rail precharge logic, this work presented a new power consistent PAA resistant gate circuit design with low power consumption and low cost, and its practicability were verified by experiments.
分 类 号:TN791[电子电信—电路与系统]
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