一种基于0.18μm SiGe工艺的8 GHz前置分频器  

A 8 GHz Prescaler in a 0.18 μm SiGe Technology

作　　者：张红 张振宁 叶松[1] ZHANG Hong;ZHANG Zhenning;YE Song(College of Communication Engineering,Chengdu University of Information Technology,Chengdu 610225,China;Iridium Communications Ltd.,Chengdu 610225,China)

机构地区：[1]成都信息工程大学通信工程学院,四川成都610225 [2]成都铱通科技有限公司,四川成都610225

出　　处：《成都信息工程大学学报》2022年第4期392-395,共4页Journal of Chengdu University of Information Technology

摘　　要：随着无线通信技术的高速发展,对高频率高带宽的频率源需求愈加迫切。在高频大带宽频率源中,高性能的分频器是一个重要的部分。为满足高频宽带通信的应用需求,设计实现了基于电流模逻辑结构的高频宽带除8/9、16/17前置分频器。通过分析CML锁存器工作原理与性能,设计了优化参数的集合与门的CML结构D触发器、双路选择器、逻辑或门结构,并基于该D触发器、选择器、或门设计了除8/9、16/17前置分频器。前置分频器使用0.18μm SiGe BiCMOS工艺流片并测试,测试结果表明,在3.3 V电源电压下,分频器工作频率可达20 MHz~8 GHz,带宽约8 GHz,功耗6.6 mW。与其他设计相比,设计的分频器功耗低同时还具有较高的工作频率和大的带宽。With the rapid development of wireless communication technology,the demand for high frequency and wideband frequency sources is becoming more and more urgent.In the high frequency and wideband frequency sources,the high performance Prescaler is an important part.In order to meet the application requirements of high frequency wideband communication,a high frequency wideband prescaler 8/9 and 16/17 based on CML structure is designed and implemented in this paper.By analyzing the working principle and performance of CML latch,the CML structure D flip-flop,double selector and logic OR gate structure of optimized parameter set AND gate are designed,and based on the D flip-flop,selector and OR gate,prescaler 8/9 and 16/17 are designed.The prescaler was tested by 0.18 μm SiGe BiCMOS process.The test results show that under 3.3 V power supply voltage,the working frequency of the divider can reach 20 MHz-8 GHz,the bandwidth is about 8 GHz,and the power consumption is about 6.6 mW.Compared with other designs,the frequency divider designed in this paper has lower power consumption and higher working frequency and large bandwidth.

关 键 词：CML 前置分频器 HBT SIGE BICMOS 

分 类 号：TN772[电子电信—电路与系统]