基于FPGA的并行MMSA数字预失真器设计与实现  

Design and Implementation of Parallel MMSA Digital Predistortion Based on FPGA

作　　者：解程杰 马施榆 XIE Cheng-jie;MA shi-yu(Faculty of Electrical Engineering and Computer Science,Ningbo University,Ningbo 315211,China)

机构地区：[1]宁波大学信息科学与工程学院,宁波315211

出　　处：《无线通信技术》2022年第3期50-53,62,共5页Wireless Communication Technology

基　　金：国家自然科学基金项目(U1809203,62071264)。

摘　　要：本文设计并实现了并行处理架构的FPGA的M-MSA数字预失真器,并对其硬件资源功耗等参数进行分析。在同一架构上实现的IMSA模型进行FPGA资源对比,MMSA资源占用率更低,其LUT资源减少9%,FF资源减少6%,DSP资源减少28%以及片上总功耗减少1.411W。同时通过FPGA平台采用闭环测试的方法对其进行验证,MMSA上下边带ACPR分别改善了21.35dB和19.42dB。本文成功在FPGA实现了MMSA预失真器,并证明其对非线性失真良好的改善能力以及工程实现的可行性。In this paper, the M-MSA digital predistorter of FPGA with parallel processing architecture is designed and implemented, and the parameters such as power consumption of hardware resources are analyzed. The IMSA model implemented on the same architecture is compared with FPGA resources. The MMSA resource occupancy rate is lower, the LUT resource is reduced by 9 %, the FF resource is reduced by 6 %, the DSP resource is reduced by 28 % and the total power consumption on chip is reduced by 1.411 W. At the same time, it is verified by FPGA platform using closed-loop test method. The ACPR of the upper and lower sidebands of MMSA are improved by 21.35 dB and 19.42 dB respectively. We successfully implemented MMSA predistorter on FPGA, and proved its good improvement ability for nonlinear distortion and the feasibility of engineering implementation.

关 键 词：5G 数字预失真 数字预失真器 FPGA MMSA 

分 类 号：TN914[电子电信—通信与信息系统]